C8051F34A-GM Silicon Laboratories Inc, C8051F34A-GM Datasheet - Page 161

• Manufacturer Part Number: C8051F34A-GM
• Description: IC 8051 MCU 64K FLASH MEM 32-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F34A-GM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 32-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4352 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Package: 32QFN EP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Cpu Family: C8051F34x
• Device Core Size: 8b
• Frequency (max): 48MHz
• Total Internal Ram Size: 4.25KB
• # I/os (max): 25
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1350-5

Bit7:
Bit6:
Bit5:
Bits4–3: PHYTST1–0: Physical Layer Test
Bit2:
Bit1:
Bit0:
PREN
R/W
Bit7
PREN: Internal Pull-up Resistor Enable
The location of the pull-up resistor (D+ or D–) is determined by the SPEED bit.
0: Internal pull-up resistor disabled (device effectively detached from the USB network).
1: Internal pull-up resistor enabled when VBUS is present (device attached to the USB net-
work).
PHYEN: Physical Layer Enable
This bit enables/disables the USB0 physical layer transceiver.
0: Transceiver disabled (suspend).
1: Transceiver enabled (normal).
SPEED: USB0 Speed Select
This bit selects the USB0 speed.
0: USB0 operates as a Low Speed device. If enabled, the internal pull-up resistor appears
on the D– line.
1: USB0 operates as a Full Speed device. If enabled, the internal pull-up resistor appears on
the D+ line.
These bits can be used to test the USB0 transceiver.
DFREC: Differential Receiver
The state of this bit indicates the current differential value present on the D+ and D– lines
when PHYEN = ‘1’.
0: Differential ‘0’ signaling on the bus.
1: Differential ‘1’ signaling on the bus.
Dp: D+ Signal Status
This bit indicates the current logic level of the D+ pin.
0: D+ signal currently at logic 0.
1: D+ signal currently at logic 1.
Dn: D- Signal Status
This bit indicates the current logic level of the D– pin.
0: D– signal currently at logic 0.
1: D– signal currently at logic 1.
PHYTST[1:0]
PHYEN
SFR Definition 16.1. USB0XCN: USB0 Transceiver Control
R/W
Bit6
00b
01b
10b
11b
SPEED
R/W
Bit5
Mode 0: Normal (non-test mode)
Mode 1: Differential ‘1’ Forced
Mode 2: Differential ‘0’ Forced
Mode 3: Single-Ended ‘0’ Forced
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
PHYTST1 PHYTST0 DFREC
R/W
Bit4
Mode
Rev. 1.3
R/W
Bit3
Bit2
R
D+
X
1
0
0
D–
X
0
1
0
Bit1
Dp
R
Bit0
Dn
R
SFR Address:
00000000
Reset Value
0xD7
161