PIC16C770-I/P Microchip Technology, PIC16C770-I/P Datasheet - Page 36

IC MCU CMOS A/D 2K 20MHZ 20-DIP

PIC16C770-I/P

Manufacturer Part Number
PIC16C770-I/P
Description
IC MCU CMOS A/D 2K 20MHZ 20-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C770-I/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of
RoHS Compliant
Core
PIC
Processor Series
PIC16C
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
256 B
Data Rom Size
256 B
On-chip Adc
6 bit
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Mounting Style
Through Hole
Height
3.3 mm
Interface Type
I2C, SPI, SSP
Length
26.16 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP200 - ADAPTER ICE 20DIP/SOIC/SSOPAC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C770I/P
PIC16C717/770/771
REGISTER 3-2:
REGISTER 3-3:
DS41120B-page 34
bit 7-0
bit 7-0
WEAK PULL-UP PORTB REGISTER (WPUB: 95h)
INTERRUPT-ON-CHANGE PORTB REGISTER (IOCB: 96h)
bit 7
WPUB<7:0>: PORTB Weak Pull-Up Control bits
1 = Weak pull-up enabled
0 = Weak pull-up disabled
Legend:
R = Readable bit
- n = Value at POR
bit 7
IOCB<7:0>: Interrupt-on-Change PORTB Control bits
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Legend:
R = Readable bit
- n = Value at POR
WPUB7
Note:
IOCB7
R/W-1
R/W-1
Note 1: For the WPUB register setting to take effect, the RBPU bit in the OPTION_REG
2: The weak pull-up device is automatically disabled if the pin is in Output mode
The interrupt enable bits GIE and RBIE in the INTCON Register must be set for indi-
vidual interrupts to be recognized.
register must be cleared.
(TRIS = 0).
WPUB6
IOCB6
R/W-1
R/W-1
WPUB5
IOCB5
R/W-1
R/W-1
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
WPUB4
IOCB4
R/W-1
R/W-1
WPUB3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
IOCB3
R/W-1
R/W-0
WPUB2
IOCB2
R/W-1
R/W-0
2002 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPUB1
IOCB1
R/W-1
R/W-0
WPUB0
IOCB0
R/W-1
R/W-0
bit 0
bit 0

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