ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 146

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ATA6616-P3PW

Manufacturer Part Number
ATA6616-P3PW
Description
TXRX MULTICHIP MOD LIN SIP 38QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6616-P3PW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.13.8.1
4.13.8.2
146
Atmel ATA6616/ATA6617
Compare Output Function
Compare Output Mode and Waveform Generation
Figure 4-49. Compare Match Output Logic
The general I/O port function is overridden by the Output Compare (OC1A/B) from the Wave-
form Generator if either of the COM1A/B1:0 bits are set and if OCnxi respective bit is set in
TCCR1D register. However, the OC1A/Bi pin direction (input or output) is still controlled by the
Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC1A/Bi
pin (DDR_OC1A/Bi) must be set as output before the OC1A/B value is visible on the pin. The
port override function is generally independent of the Waveform Generation mode, but there
are some exceptions. Refer to
The design of the Output Compare pin logic allows initialization of the OC1A/B state before the
output is enabled. Note that some COM1A/B1:0 bit settings are reserved for certain modes of
operation.
The COM1A/B1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COM1A/B1:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM1A/B1:0 = 0 tells the Waveform Generator that no
action on the OC1A/B Register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to
refer to
refer to
A change of the COM1A/B1:0 bits state will have effect at the first compare match after the
bits are written. For non-PWM modes, the action can be forced to have immediate effect by
using the FOC1A/B strobe bits.
Table 4-36 on page
Table 4-37 on page
See “16-bit Timer/Counter Register Description” on page 157.
FOCnx
COMnx1
COMnx0
clk
I/O
158, and for phase correct and phase and frequency correct PWM
158.
Waveform
Generator
Table
4-35,
OCnxi
Table 4-36
D
D
D
PORT
OCnx
DDR
Q
Q
Q
Table 4-35 on page
and
1
0
Table 4-37
157. For fast PWM mode
for details.
OCnxi
Pin
9132D–AUTO–12/10

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