PIC16F870T-I/SS Microchip Technology, PIC16F870T-I/SS Datasheet - Page 40
![IC MCU FLASH 2KX14 EE 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F870T-I/SS
Manufacturer Part Number
PIC16F870T-I/SS
Description
IC MCU FLASH 2KX14 EE 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 40 of 172
- Download datasheet (4Mb)
PIC16F870/871
4.4
This section is not applicable to the PIC16F870.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
TABLE 4-7:
TABLE 4-8:
DS30569B-page 38
08h
88h
89h
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend:
Note 1:
Address
Name
PORTD and TRISD Registers
ST = Schmitt Trigger input, TTL = TTL input
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
PORTD
TRISD
TRISE
Name
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD Data Direction Register
Bit 7
RD7
IBF
Bit 6
RD6
OBF
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
IBOV
Bit 5
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
PSPMODE
Bit 4
RD4
Input/output port pin or parallel slave port bit0.
Input/output port pin or parallel slave port bit1.
Input/output port pin or parallel slave port bit2.
Input/output port pin or parallel slave port bit3.
Input/output port pin or parallel slave port bit4.
Input/output port pin or parallel slave port bit5.
Input/output port pin or parallel slave port bit6.
Input/output port pin or parallel slave port bit7.
Bit 3
RD3
—
PORTE Data Direction Bits
FIGURE 4-6:
Bit 2
RD2
Note 1: I/O pins have protection diodes to V
Data
Bus
WR
TRIS
WR
Port
RD Port
Bit 1
RD1
TRIS Latch
Function
Data Latch
D
D
CK
CK
RD TRIS
Q
Q
Bit 0
RD0
PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
2003 Microchip Technology Inc.
Q
xxxx xxxx
1111 1111
0000 -111
POR, BOR
Value on:
EN
EN
Schmitt
Trigger
Input
Buffer
D
DD
and V
uuuu uuuu
1111 1111
0000 -111
I/O pin
Value on
RESETS
SS
all other
.
(1)
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