PIC16F870T-I/SS Microchip Technology, PIC16F870T-I/SS Datasheet - Page 71

• Manufacturer Part Number: PIC16F870T-I/SS
• Description: IC MCU FLASH 2KX14 EE 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F870T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• For Use With: I3-DB16F871 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When setting up an Asynchronous Reception, follow
these steps:
1.
2.
3.
4.
5.
TABLE 9-6:
 2003 Microchip Technology Inc.
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH (Section 9.1).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
INTCON
PIR1
RCSTA
RCREG USART Receive Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
PSPIF
PSPIE
CSRC
SPEN
Bit 7
GIE
(1)
(1)
ADIF
ADIE
Bit 6
PEIE
RX9
TX9
SREN
TXEN
RCIE
RCIF
Bit 5
T0IE
CREN
SYNC
INTE
TXIE
Bit 4
TXIF
RBIE
Bit 3
—
—
—
—
6.
7.
8.
9.
10. If using interrupts, ensure that GIE and PEIE
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
BRGH
FERR
Bit 2
T0IF
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE is set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
(bits 7 and 6) of the INTCON register are set.
OERR
TRMT
Bit 1
INTF
PIC16F870/871
RX9D
TX9D
Bit 0
R0IF
0000 000x
-000 0000
0000 -00x
0000 0000
0000 -000
0000 -010
0000 0000
POR, BOR
Value on:
DS30569B-page 69
0000 000u
-000 0000
0000 -00x
0000 0000
0000 -000
0000 -010
0000 0000
Value on
RESETS
all other