AT32UC3B164-AUT Atmel, AT32UC3B164-AUT Datasheet - Page 469

IC MCU AVR32 64KB FLASH 48-TQFP

AT32UC3B164-AUT

Manufacturer Part Number
AT32UC3B164-AUT
Description
IC MCU AVR32 64KB FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3B164-AUT

Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Controller Family/series
AT32UC3B
No. Of I/o's
28
Ram Memory Size
16KB
Cpu Speed
60MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B164-AUT
Manufacturer:
Atmel
Quantity:
10 000
32059I–06/2010
UNDERFI: Underflow Interrupt
TXOUTI: Transmitted OUT Data Interrupt
RXINI: Received IN Data Interrupt
This bit is set, for isochronous and Interrupt IN/OUT pipe, when an error flow occurs. This triggers an interrupt if the UNDERFIE
This bit is set, for Isochronous or interrupt OUT pipe, when a transaction underflow occurs in the current pipe. (the pipe can’t
This bit is set, for Isochronous or interrupt IN pipe, when a transaction flow error occurs in the current pipe. i.e, the current bank
This bit is cleared when the UNDERFIEC bit is written to one.
This bit is set when the current OUT bank is free and can be filled. This triggers an interrupt if the TXOUTE bit is one.
This bit is cleared when the TXOUTIC bit is written to one.
This bit is set when a new USB message is stored in the current bank of the pipe. This triggers an interrupt if the RXINE bit is
This bit is cleared when the RXINIC bit is written to one.
bit is one.
send the OUT data packet in time because the current bank is not ready). A zero-length-packet (ZLP) will be sent instead of.
of the pipe is not free whereas a new IN USB packet is received. This packet is not stored in the bank. For Interrupt pipe, the
overflowed packet is ACKed to respect the USB standard.
one.
AT32UC3B
469

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