AT32UC3B164-AUT Atmel, AT32UC3B164-AUT Datasheet - Page 614

• Manufacturer Part Number: AT32UC3B164-AUT
• Description: IC MCU AVR32 64KB FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B164-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 28
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 28
• Ram Memory Size: 16KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

27.6.2
27.6.3
27.7
32059I–06/2010
SAB address map
Reset register
Boundary-Scan Chain
The reset register is selected by the AVR_RESET instruction and contains one bit for each reset
domain in the device. Setting each bit to one will keep that domain reset until the bit is cleared.
Note: This register is primarily intended for compatibility with other 32-bit AVR devices. Certain
operations may not function correctly when parts of the system are reset. It is generally recom-
mended to only write 0x11111 or 0x00000 to these bits to ensure no unintended side effects
occur.
The Boundary-Scan Chain has the capability of driving and observing the logic levels on the dig-
ital I/O pins, as well as driving and observing the logic levels between the digital I/O pins and the
internal logic. Typically, output value, output enable, and input data are all available in the
boundary scan chain.
The boundary scan chain is described in the BDSL (Boundary Scan Description Language) file
available at the Atmel web site.
The Service Access Bus (SAB) gives the user access to the internal address space and other
features through a 36 bits address space. The 4 MSBs identify the slave number, while the 32
LSBs are decoded within the slave’s address space. The SAB slaves are shown in
Table 27-28. SAB Slaves, addresses and descriptions.
Bit
Device ID
CPU
APP
OCD
RSERVED
Memory Service
Unallocated
Reserved
Slave
OCD
HSB
HSB
Unit
OCD
CPU
HSB and PB buses
On-Chip Debug logic and registers
No effect
4
Address [35:32]
Other
0x0
0x1
0x4
0x5
0x6
APP
3
Description
Intentionally unallocated
OCD registers
HSB memory space, as seen by the CPU
Alternative mapping for HSB space, for compatibility with
other 32-bit AVR devices.
Memory Service Unit registers
Unused
RESERVED
2
RESERVED
1
AT32UC3B
Table
CPU
LSB
0
27-28.
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