PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 155

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

The three input capture channels are controlled
through
CAP1CON, CAP2CON and CAP3CON. Each channel
is configured independently with its dedicated register.
The implementation of the registers is identical except
for the Special Event Trigger (see
“Special Event Trigger (CAP1
Capture Control register is shown in
REGISTER 17-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3-0
Note 1:
U-0
—
the
Special Event Trigger is only available on CAP1. For CAP2 and CAP3, this configuration is unused.
Unimplemented: Read as ‘0’
CAPxREN: Time Base Reset Enable bit
1 = Enabled
0 = Disable selected time base Reset on capture
Unimplemented: Read as ‘0’
CAPxM<3:0>: Input Capture x (ICx) Mode Select bits
1111 = Special Event Trigger mode; the trigger occurs on every rising edge on CAP1 input
1110 = Special Event Trigger mode; the trigger occurs on every falling edge on CAP1 input
1101 = Unused
1100 = Unused
1011 = Unused
1010 = Unused
1001 = Unused
1000 = Capture on every CAPx input state change
0111 = Pulse-Width Measurement mode, every rising to falling edge
0110 = Pulse-Width Measurement mode, every falling to rising edge
0101 = Frequency Measurement mode, every rising edge
0100 = Capture mode, every 16th rising edge
0011 = Capture mode, every 4th rising edge
0010 = Capture mode, every rising edge
0001 = Capture mode, every falling edge
0000 = Input Capture x (ICx) off
CAPxREN
Input
R/W-0
CAPxCON: INPUT CAPTURE x CONTROL REGISTER
Capture
W = Writable bit
‘1’ = Bit is set
Only)”). The typical
U-0
—
Control
Register
Section 17.1.8
registers,
PIC18F2331/2431/4331/4431
17-1.
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CAPxM3
R/W-0
Note:
Throughout this section, references to
registers and bit names that may be asso-
ciated with a specific capture channel will
be referred to generically by the use of the
term ‘x’ in place of the channel number.
For example, ‘CAPxREN’ may refer to the
Capture Reset Enable bit in CAP1CON,
CAP2CON or CAP3CON.
CAPxM2
R/W-0
x = Bit is unknown
CAPxM1
R/W-0
DS39616D-page 155
(1)
CAPxM0
(1)
R/W-0
bit 0