PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 199

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

18.11.3
The PWMPIN Configuration bit determines the PWM
output pins to be PWM output pins or digital I/O pins,
after the device comes out of Reset. If the PWMPIN
Configuration bit is unprogrammed (default), the
PWMEN<2:0> control bits will be cleared on a device
Reset. Consequently, all PWM outputs will be tri-stated
and controlled by the corresponding PORT and TRIS
registers. If the PWMPIN Configuration bit is pro-
grammed low, the PWMEN<2:0> control bits will be
set, as follows, on a device Reset:
• PWMEN<2:0> = 101 if device has 8 PWM pins
• PWMEN<2:0> = 100 if device has 6 PWM pins
All PWM pins will be enabled for PWM output and will
have the output polarity defined by the HPOL and
LPOL Configuration bits.
18.12 PWM Fault Inputs
There are two Fault inputs associated with the PWM
module. The main purpose of the input Fault pins is to
disable the PWM output signals and drive them into an
inactive state. The action of the Fault inputs is
performed directly in hardware so that when a Fault
occurs, it can be managed quickly and the PWM
outputs are put into an inactive state to save the power
devices connected to the PWMs.
The PWM Fault inputs are FLTA and FLTB, which can
come from I/O pins, the CPU or another module. The
FLTA and FLTB pins are active-low inputs so it is easy to
“OR” many sources to the same input. FLTB and its asso-
ciated logic are not implemented on PIC18F2331/2431
devices.
The FLTCONFIG register
settings of FLTA and FLTB inputs.
 2010 Microchip Technology Inc.
(PIC18F4331/4431 devices)
(PIC18F2331/2431 devices)
Note:
PWM OUTPUT PIN RESET STATES
The inactive state of the PWM pins are
dependent on the HPOL and LPOL Con-
figuration bit settings, which define the
active and inactive state for PWM outputs.
(Register
18-8) defines the
PIC18F2331/2431/4331/4431
18.12.1
By setting the bits, FLTAEN and FLTBEN in the
FLTCONFIG register, the corresponding Fault inputs
are enabled. If both bits are cleared, then the Fault
inputs have no effect on the PWM module.
18.12.2
The FLTAMOD and FLTBMOD bits in the FLTCONFIG
register determine the modes of PWM I/O pins that are
deactivated when they are overridden by Fault input.
The FLTAS and FLTBS bits in the FLTCONFIG register
give the status of Fault A and Fault B inputs.
Each of the Fault inputs have two modes of operation:
• Inactive Mode (FLTxMOD = 0)
• Cycle-by-Cycle Mode (FLTxMOD = 1)
This is a Catastrophic Fault Management mode.
When the Fault occurs in this mode, the PWM out-
puts are deactivated. The PWM pins will remain in
Inactivate mode until the Fault is cleared (Fault
input is driven high) and the corresponding Fault
Status bit has been cleared in software. The PWM
outputs are enabled immediately at the beginning
of the following PWM period, after the Fault Status
bit (FLTxS) is cleared.
When the Fault occurs in this mode, the PWM
outputs are deactivated. The PWM outputs will
remain in the defined Fault states (all PWM
outputs inactive) for as long as the Fault pin is held
low. After the Fault pin is driven high, the PWM
outputs will return to normal operation at the begin-
ning of the following PWM period and the FLTxS
bit is automatically cleared.
FAULT PIN ENABLE BITS
MFAULT INPUT MODES
DS39616D-page 199