PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 311

IC MCU FLASH 8KX16 40DIP

PIC18F4431-E/P

Manufacturer Part Number
PIC18F4431-E/P
Description
IC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/P

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4431-E/P
Manufacturer:
MICROCHIP
Quantity:
1 785
Part Number:
PIC18F4431-E/P
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18F4431-E/PT
Manufacturer:
JOHANSON
Quantity:
24 000
Part Number:
PIC18F4431-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
NEGF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ‘f’
Negate f
[ label ]
0  f  255
a  [0,1]
( f ) + 1  f
N, OV, C, DC, Z
Location, ‘f’, is negated using two’s
complement. The result is placed in the
data memory location, ‘f’. If ‘a’
is ‘0’, the Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value.
1
1
NEGF
Read
0110
Q2
0011 1010 [0x3A]
1100 0110 [0xC6]
NEGF
REG, 1
110a
Process
Data
Q3
f [,a]
ffff
register ‘f’
PIC18F2331/2431/4331/4431
Write
Q4
ffff
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
None.
Decode
Q1
operation
No Operation
[ label ]
None
No operation
None
No operation.
1
1
0000
1111
No
Q2
NOP
0000
xxxx
operation
No
Q3
DS39616D-page 311
0000
xxxx
operation
No
Q4
0000
xxxx

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