DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 148

IC DSPIC MCU/DSP 64K 44-TQFP

DSPIC33FJ64GP204-I/PT

Manufacturer Part Number
DSPIC33FJ64GP204-I/PT
Description
IC DSPIC MCU/DSP 64K 44-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Core Frequency
40MHz
Embedded Interface Type
ECAN, I2C, SPI, UART
No. Of I/o's
35
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Price
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10.1.1
In addition to the PORT, LAT and TRIS registers for
data control, some port pins can also be individually
configured for either digital or open-drain output. This
is controlled by the Open-Drain Control register,
ODCx, associated with each port. Setting any of the
bits configures the corresponding pin to act as an
open-drain output.
TABLE 10-1:
10.2
The AD1PCFGL and TRIS registers control the opera-
tion of the analog-to-digital (A/D) port pins. The port
pins that are to function as analog inputs must have
their corresponding TRIS bit set (input). If the TRIS bit
is cleared (output), the digital output level (V
is converted.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs do not convert an
analog input. Analog levels on any pin defined as a
digital input (including the ANx pins) can cause the
input buffer to consume current that exceeds the
device specifications.
DS70292B-page 146
Configuring Analog Port Pins
I/O Pin
RA10
OPEN-DRAIN CONFIGURATION
RA0
RA1
RA2
RA3
RA4
RA7
RA8
RA9
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
RB8
AVAILABLE I/O PINS AND THEIR FUNCTIONALITY
Digital Only/5V Tolerant
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
OH
or V
Preliminary
OL
)
The open-drain feature allows the generation of
outputs higher than V
digital-only pins by using external pull-up resistors.
The maximum open-drain voltage allowed is the same
as the maximum V
Some I/O pins may have internal analog functionality
that will not be shown on the device pin diagram.
These pins must be treated as analog pins. Table 10-1
lists all available pins and their functionality.
10.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be an NOP, as shown in Example 10-1.
I/O Pin
RB10
RB11
RB12
RB13
RB14
RB15
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
RC8
RC9
RB9
I/O PORT WRITE/READ TIMING
IH
specification.
DD
© 2008 Microchip Technology Inc.
(e.g., 5V) on any desired
Digital Only/5V Tolerant
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No

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