DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 179

• Manufacturer Part Number: DSPIC33FJ64GP204-I/PT
• Description: IC DSPIC MCU/DSP 64K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Core Frequency: 40MHz
• Embedded Interface Type: ECAN, I2C, SPI, UART
• No. Of I/o's: 35
• Flash Memory Size: 64KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

12.0
Timer2 and Timer4 are Type B timers with the following
specific features:
• A Type B timer can be concatenated with a Type
FIGURE 12-1:
FIGURE 12-2:
© 2008 Microchip Technology Inc.
Note:
C timer to form a 32-bit timer
TxCK
TIMER2/3 AND TIMER4/5
FEATURE
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04,
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
the dsPIC33F Family Reference Manual,
“Section 11. Timers” (DS70205), which
is available from the Microchip website
(www.microchip.com).
TxCK
the
F
TYPE B TIMER BLOCK DIAGRAM (x = 2 or 4)
TYPE C TIMER BLOCK DIAGRAM (x = 3 or 5)
CY
Sync
TCKPS<1:0>
dsPIC33FJ32GP302/304,
Prescaler
F
(/n)
CY
TCKPS<1:0>
TCKPS<1:0>
Prescaler
Prescaler
Sync
Gate
(/n)
(/n)
TCKPS<1:0>
Prescaler
Sync
Gate
Sync
families
(/n)
and
Preliminary
of
Falling Edge
Falling Edge
TGATE
Detect
TCS
Detect
TGATE
TCS
10
00
x1
• The external clock input (TxCK) is always
A block diagram of the Type B timer is shown in
Figure 12-1.
Timer3 and Timer5 are Type C timers with the following
specific features:
• A Type C timer can be concatenated with a Type
• At least one Type C timer has the ability to trigger
• The external clock input (TxCK) is always syn-
A block diagram of the Type C timer is shown in
Figure 12-2.
synchronized to the internal device clock and the
clock synchronization is performed after the
prescaler.
B timer to form a 32-bit timer
an A/D conversion.
chronized to the internal device clock and the
clock synchronization is performed before the
prescaler
10
00
x1
Comparator
TMRx
Comparator
PRx
TMRx
PRx
Reset
Equal
Reset
Equal
ADC SOC Trigger
TGATE
TGATE
1
0
1
0
Set TxIF flag
Set TxIF flag
DS70292B-page 177