DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 255

• Manufacturer Part Number: DSPIC33FJ64GP204-I/PT
• Description: IC DSPIC MCU/DSP 64K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Core Frequency: 40MHz
• Embedded Interface Type: ECAN, I2C, SPI, UART
• No. Of I/o's: 35
• Flash Memory Size: 64KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

21.0
The Audio Digital-to-Analog Converter (DAC) module
is a 16-bit Delta-Sigma signal converter designed for
audio applications. It has two output channels, left and
right to support stereo applications. Each DAC output
channel provides three voltage outputs, positive DAC
output, negative DAC output, and the midpoint voltage
output
dsPIC33FJ128GP804
dsPIC33FJ64GP802
devices provide positive DAC output and negative DAC
output voltages. The positive and negative DAC
outputs are differential about a midpoint voltage of
approximately 1.65 volts to drive the speakers with a
Bridge-Tied Load (BTL) configuration.
21.1
• 16-bit resolution (14-bit accuracy)
• Second-Order Digital Delta-Sigma Modulator
• 256 X Over-Sampling Ratio
• 128-Tap FIR Current-Steering Analog Recon-
• 100 KSPS Maximum Sampling Rate
• User controllable Sample Clock
• Input Frequency 45 kHz max
• Differential Analog Outputs
• Signal-To-Noise: 90 dB
• 4-deep input Buffer
• 16-bit Processor I/O, and DMA interfaces
21.2
The functional block diagram of the Audio DAC module
is shown in Figure 21-1. The Audio DAC module pro-
vides a 4-deep data input FIFO buffer for each output
channel. If the DMA module and/or the processor can-
not provide output data in a timely manner, and the
FIFO becomes empty, the DAC accepts data from the
DAC Default Data register (DACDFLT). This safety fea-
ture is useful for industrial control applications where
the DAC output controls an important processor or
machinery. The DACDFLT register should be initialized
© 2008 Microchip Technology Inc.
Note:
struction Filter
AUDIO DIGITAL-TO-ANALOG
CONVERTER (DAC)
KEY FEATURES
DAC Module Operation
for
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04,
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the dsPIC33F Family
Reference Manual, “Section 33. Audio
Digital-to-Analog
which is available from the Microchip
website (www.microchip.com).
the
the
and
dsPIC33FJ64GP804
dsPIC33FJ32GP302/304,
devices.
Converter
dsPIC33FJ128GP802
families
(DAC)”,
and
The
and
Preliminary
To
of
with a “safe” output value. Often the safe output value
is either the midpoint value (0x8000) or a zero value
(0x0000).
The digital interpolator up-samples the input signals,
where the over-sampling ratio is 256x which creates
data points between the user supplied data points. The
interpolator also includes processing by digital filters to
provide “noise shaping” to move the converter noise
above 20 kHZ (upper limit of the pass band). The
output of the interpolator drives the Sigma-Delta
modulator. The serial data bit stream from the Sigma-
Delta modulator is processed by the reconstruction
filter. The differential outputs of the reconstruction filter
are amplified by Op Amps to provide the required
2 volts peak-to-peak voltage swing into a 1 kOhm load.
21.3
The DAC output data stream can be in a two’s comple-
ment signed number format or as an unsigned number
format.
The Audio DAC module features the ability to accept
the 16-bit input data in a two’s complement signed
number format or as an unsigned number format.
The data formatting is controlled by the Data Format
Control (FORM<8>) bit in the DAC1CON register.
The supported formats are:
• 1 = Signed (two’s complement)
• 0 = Unsigned
If the FORM bit is configured for “Unsigned data” then
the user input data yields the following behavior:
• 0xFFFF = most positive output voltage
• 0x8000 = mid point output voltage
• 0x7FFF = a value just below the midpoint
• 0x0000 = minimum output voltage
If the FORM bit is configured for “signed data” then the
user input data yields the following behavior:
• 0x7FFF = most positive output voltage
• 0x0000 = mid point output voltage
• 0xFFFF = value just below the midpoint
• 0x8000 = minimum output voltage
The Audio DAC provides an analog output proportional
to the digital input value. The maximum 100,000 sam-
ples per second (100ksps) update rate provides good
quality audio reproduction.
The Audio DAC provides differential Analog outputs
whose common mode output voltage is a nominal 1.65
volts with a supply voltage of 3.3 volts. The voltage
swing is approximately ±1 volt about the 1.65 volt mid-
point or approximately 0.65 volts to 2.65 volts into a
1 kOhm load.
DAC Output Format
DS70292B-page 253