DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 293

• Manufacturer Part Number: DSPIC33FJ64GP204-I/PT
• Description: IC DSPIC MCU/DSP 64K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Core Frequency: 40MHz
• Embedded Interface Type: ECAN, I2C, SPI, UART
• No. Of I/o's: 35
• Flash Memory Size: 64KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

26.2
All
dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/
X04 devices power their core digital logic at a nominal
2.5V. This can create a conflict for designs that are
required to operate at a higher typical voltage, such as
3.3V. To simplify system design, all devices in the
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04,
and dsPIC33FJ128GPX02/X04 family incorporate an
on-chip regulator that allows the device to run its core
logic from V
The regulator provides power to the core from the other
V
(less than 5 Ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure 26-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Table 29-13 located in Section 29.1
“DC Characteristics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 26-1:
© 2008 Microchip Technology Inc.
DD
Note:
Note 1: These are typical operating voltages. Refer
pins. When the regulator is enabled, a low-ESR
On-Chip Voltage Regulator
of
,
2: It is important for the low-ESR capacitor to
STARTUP
it takes approximately 20 μs for the on-chip
C
It is important for the low-ESR capacitor to
be placed as close as possible to the
V
DD
F
DDCORE
to Section TABLE 29-13: “Internal Volt-
age Regulator Specifications” located in
Section 29.1 “DC Characteristics” for
the full operating ranges of V
V
be placed as close as possible to the
V
.
3.3V
DDCORE
DDCORE
the
is applied every time the device
pin.
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
.
pin.
V
V
V
DD
DDCORE
SS
dsPIC33F
STARTUP
dsPIC33FJ32GP302/304,
/V
CAP
, code execution is
DDCORE
(1)
DD
/V
CAP
and
Preliminary
pin
26.3
The Brown-out Reset (BOR) module is based on an
internal voltage reference circuit that monitors the reg-
ulated supply voltage V
the BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (for
example, missing portions of the AC cycle waveform
due to bad power transmission lines, or voltage sags
due to excessive current draw when a large inductive
load is turned on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) is applied
before the internal Reset is released. If TPWRT = 0 and
a crystal oscillator is being used, then a nominal delay
of TFSCM = 100 is applied. The total delay in this case
is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that
a BOR has occurred. The BOR circuit continues to
operate while in Sleep or Idle modes and resets the
device should VDD fall below the BOR threshold volt-
age.
BOR: Brown-Out Reset
DDCORE
. The main purpose of
DS70292B-page 291