ATMEGA32U4-MU Atmel, ATMEGA32U4-MU Datasheet - Page 153
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ATMEGA32U4-MU
Manufacturer Part Number
ATMEGA32U4-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U4-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
EBI/I2S/SPI/TWI/USART/USB
On-chip Adc
12-chx10-bit
Number Of Timers
5
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16MU
ATMEGA32U4-16MU
ATMEGA32U4-16MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
- Current page: 153 of 433
- Download datasheet (9Mb)
7766F–AVR–11/10
Match between TCNT4 and OCR4x while upcounting, and set on the Compare Match while
down-counting. In inverting Output Compare mode, the operation is inverted. In complementary
Compare Output Mode, the Waveform Output is cleared on the Compare Match and set at BOT-
TOM. The dual-slope operation has lower maximum operation frequency than single slope
operation. However, due to the symmetric feature of the dual-slope PWM modes, these modes
are preferred for motor control applications.
The timing diagram for the Phase and Frequency Correct PWM mode is shown on
in which the TCNT4 value is shown as a histogram for illustrating the dual-slope operation. The
counter is incremented until the counter value matches TOP. When the counter reaches TOP, it
changes the count direction. The TCNT4 value will be equal to TOP for one timer clock cycle.
The diagram includes the Waveform Output (OCW4x) in non-inverted and inverted Compare
Output Mode. The small horizontal line marks on the TCNT4 slopes represent Compare
Matches between OCR4x and TCNT4.
Figure 15-14. Phase and Frequency Correct PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV4) is set each time the counter reaches BOTTOM. The
Interrupt Flag can be used to generate an interrupt each time the counter reaches the BOTTOM
value.
In the Phase and Frequency Correct PWM mode, the compare unit allows generation of PWM
waveforms on the OC4x pins. Setting the COM4x1:0 bits to two will produce a non-inverted
PWM and setting the COM4x1:0 to three will produce an inverted PWM output. Setting the
COM4A1:0 bits to one will enable complementary Compare Output mode and produce both the
non-inverted (OC4x) and inverted output (OC4x). The actual values will only be visible on the
port pin if the data direction for the port pin is set as output. The PWM waveform is generated by
clearing (or setting) the Waveform Output (OCW4x) at the Compare Match between OCR4x and
TCNT4 when the counter increments, and setting (or clearing) the Waveform Output at Compare
Match when the counter decrements. The PWM frequency for the output when using the Phase
and Frequency Correct PWM can be calculated by the following equation:
(COMnx = 2)
TCNTn
OCWnx
OCWnx
(COMnx = 3)
Period
1
f
OCnxPCPWM
2
=
f
------------ -
clkT4
N
3
ATmega16/32U4
OCnx Interrupt Flag Set
OCRnx Update
TOVn Interrupt Flag Set
Figure 15-14
153
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