ATMEGA32U4-MU Atmel, ATMEGA32U4-MU Datasheet - Page 176

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ATMEGA32U4-MU

Manufacturer Part Number
ATMEGA32U4-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32U4-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
EBI/I2S/SPI/TWI/USART/USB
On-chip Adc
12-chx10-bit
Number Of Timers
5
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16MU
ATMEGA32U4-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
16.2.1
7766F–AVR–11/10
Timing Example
When the modulator is enabled the type of modulation (logical AND or OR) can be selected by
the PORTB7 Register. Note that the DDRB7 controls the direction of the port independent of the
COMnx1:0 bit setting.
Figure 16-3
ate in fast PWM mode (non-inverted) and Timer/Counter0 uses CTC waveform mode with toggle
Compare Output mode (COMnx1:0 = 1).
Figure 16-3. Output Compare Modulator, Timing Diagram
In this example, Timer/Counter0 provides the carrier, while the modulating signal is generated
by the Output Compare unit C of the Timer/Counter1.
The resolution of the PWM signal (OC1C) is reduced by the modulation. The reduction factor is
equal to the number of system clock cycles of one period of the carrier (OC0A). In this example
the resolution is reduced by a factor of two. The reason for the reduction is illustrated in
16-3
high time is one cycle longer than the period 3 high time, but the result on the PB7 output is
equal in both periods.
(FPWM Mode)
at the second and third period of the PB7 output when PORTB7 equals zero. The period 2
(PORTB7 = 0)
(PORTB7 = 1)
(CTC Mode)
(Period)
OC1C
OC0A
clk
PB7
PB7
illustrates the modulator in action. In this example the Timer/Counter1 is set to oper-
I/O
1
2
ATmega16/32U4
3
Figure
176

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