AT32UC3B0256-A2UR Atmel, AT32UC3B0256-A2UR Datasheet - Page 413
![MCU AVR32 256K FLASH 64-TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0256-A2UR
Manufacturer Part Number
AT32UC3B0256-A2UR
Description
MCU AVR32 256K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B1512-Z1UT.pdf
(692 pages)
Specifications of AT32UC3B0256-A2UR
Package / Case
64-TQFP, 64-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Package
64TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
44
Interface Type
I2S/SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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• ROLEEXI: Role Exchange Interrupt
• BCERRI: B-Connection Error Interrupt
• VBERRI: VBus Error Interrupt
• VBUSTI: VBus Transition Interrupt
• IDTI: ID Transition Interrupt
32059K–03/2011
This bit is set when the USBB has successfully switched its mode because of an negotiation (host to device or device to host).
This triggers a USB interrupt if ROLEEXE is one.
This bit is cleared when the UBSTACLR.ROLEEXIC bit is written to one.
This bit is set when an error occurs during the B-connection. This triggers a USB interrupt if BCERRE is one.
This bit is cleared when the UBSTACLR.BCERRIC bit is written to one.
This bit shall only be used in host mode.
This bit is set when a VBus drop has been detected. This triggers a USB interrupt if VBERRE is one.
This bit is cleared when the UBSTACLR.VBERRIC bit is written to one.
This bit shall only be used in host mode.
If a VBus problem occurs, then the VBERRI interrupt is generated even if the USBB does not go to an error state because of
VBUSHWC is one.
This bit is set when a transition (high to low, low to high) has been detected on the USB_VBUS pad. This triggers an USB
interrupt if VBUSTE is one.
This bit is cleared when the UBSTACLR.VBUSTIC bit is written to one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
This bit is set when a transition (high to low, low to high) has been detected on the USB_ID input pin. This triggers an USB
interrupt if IDTE is one.
This bit is cleared when the UBSTACLR.IDTIC bit is written to one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
AT32UC3B
413
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