ATMEGA644V-10MU Atmel, ATMEGA644V-10MU Datasheet - Page 210

• Manufacturer Part Number: ATMEGA644V-10MU
• Description: IC AVR MCU FLASH 64K 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA644V-10MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Package: 44QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: JTAG/SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Assembly Code Example
ldi
out
wait1:
in
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
wait2:
in
sbrs r16,TWINT
rjmp wait2
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
out
ATmega644
r16, (1<<TWINT)|(1<<TWSTA)|
(1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, START
r16, SLA_W
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_SLA_ACK
r16, DATA
TWDR, r16
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
• When the TWINT Flag is set, the user must update all TWI Registers with the value relevant for
• After all TWI Register updates and other pending application software tasks have been
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made, for example by using include-files.
the next TWI bus cycle. As an example, TWDR must be loaded with the value to be transmitted
in the next bus cycle.
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a one
to TWINT clears the flag. The TWI will then commence executing whatever operation was
specified by the TWCR setting.
C Example
TWCR = (1<<TWINT)|(1<<TWSTA)|
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != START)
TWDR = SLA_W;
TWCR = (1<<TWINT) | (1<<TWEN); Load SLA_W into TWDR Register.
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) !=
MT_SLA_ACK)
TWDR = DATA;
TWCR = (1<<TWINT) | (1<<TWEN); Load DATA into TWDR Register.
(1<<TWEN)
;
ERROR();
;
ERROR();
Send START condition
Wait for TWINT Flag set. This
indicates that the START condition
has been transmitted
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR
Clear TWINT bit in TWCR to start
transmission of address
Wait for TWINT Flag set. This
indicates that the SLA+W has been
transmitted, and ACK/NACK has
been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from MT_SLA_ACK
go to ERROR
Clear TWINT bit in TWCR to start
transmission of data
Comments
2593N–AVR–07/10