ATMEGA644V-10MU Atmel, ATMEGA644V-10MU Datasheet - Page 234

IC AVR MCU FLASH 64K 44-QFN

ATMEGA644V-10MU

Manufacturer Part Number
ATMEGA644V-10MU
Description
IC AVR MCU FLASH 64K 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 21-1. Analog-to-digital Converter Block Schematic
21.3
234
BANDGAP (1.1V)
ADC[7:0]
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
Operation
AREF
GND
8-BIT DATABUS
ATmega644
ADC[2:0]
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be
connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal
voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve
noise immunity.
The analog input channel and differential gain are selected by writing to the MUX bits in
ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can
be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as
positive and negative inputs to the differential gain amplifier.
ADC MULTIPLEXER
SELECT (ADMUX)
INPUT
INPUT
NEG
MUX
POS
MUX
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIER
GAIN
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
-
+
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
2593N–AVR–07/10
0

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