ATMEGA644V-10MU Atmel, ATMEGA644V-10MU Datasheet - Page 220

IC AVR MCU FLASH 64K 44-QFN

ATMEGA644V-10MU

Manufacturer Part Number
ATMEGA644V-10MU
Description
IC AVR MCU FLASH 64K 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
19.7.4
220
ATmega644
Slave Transmitter Mode
Figure 19-16. Formats and States in the Slave Receiver Mode
In the Slave Transmitter mode, a number of data bytes are transmitted to a Master Receiver
(see
are zero or are masked to zero.
Figure 19-17. Data Transfer in Slave Transmitter Mode
Figure
Reception of the own
slave address and one or
more data bytes. All are
acknowledged
Last data byte received
is not acknowledged
Arbitration lost as master
and addressed as slave
Reception of the general call
address and one or more data
bytes
Last data byte received is
not acknowledged
Arbitration lost as master and
addressed as slave by general call
SDA
SCL
19-17). All the status codes mentioned in this section assume that the prescaler bits
From master to slave
From slave to master
TRANSMITTER
Device 1
SLAVE
S
SLA
General Call
Device 2
RECEIVER
MASTER
W
DATA
$60
$68
$70
$78
Device 3
A
A
A
A
n
A
........
DATA
DATA
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the Two-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Device n
$80
$90
A
A
V
CC
DATA
DATA
R1
$80
$88
$90
$98
A
A
A
A
R2
P or S
P or S
P or S
P or S
$A0
$A0
2593N–AVR–07/10

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