ATMEGA128A-MU Atmel, ATMEGA128A-MU Datasheet - Page 266

MCU 8BIT 128K ISP FLASH 64-QFN

ATMEGA128A-MU

Manufacturer Part Number
ATMEGA128A-MU
Description
MCU 8BIT 128K ISP FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128A-MU
Manufacturer:
Atmel
Quantity:
442
Part Number:
ATMEGA128A-MU
Manufacturer:
ATMEL
Quantity:
423
Part Number:
ATMEGA128A-MU
Manufacturer:
ATMEL
Quantity:
203
8151H–AVR–02/11
Table 24-5.
Signal
Name
COMP
ACLK
ACTEN
ADCBGEN
ADCEN
AMPEN
DAC_9
DAC_8
DAC_7
DAC_6
DAC_5
DAC_4
DAC_3
DAC_2
DAC_1
DAC_0
EXTCH
G10
G20
GNDEN
Boundary-scan Signals for the ADC
Direction
as Seen
from the
ADC
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Description
Comparator Output
Clock signal to gain
stages implemented as
Switch-cap filters
Enable path from gain
stages to the comparator
Enable Band-gap
reference as negative
input to comparator
Power-on signal to the
ADC
Power-on signal to the
gain stages
Bit 9 of digital value to
DAC
Bit 8 of digital value to
DAC
Bit 7 of digital value to
DAC
Bit 6 of digital value to
DAC
Bit 5 of digital value to
DAC
Bit 4 of digital value to
DAC
Bit 3 of digital value to
DAC
Bit 2 of digital value to
DAC
Bit 1 of digital value to
DAC
Bit 0 of digital value to
DAC
Connect ADC channels 0
- 3 to by-pass path
around gain stages
Enable 10x gain
Enable 20x gain
Ground the negative
input to comparator
when true
Recommen-
ded Input
when not
in Use
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
ATmega128A
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
266

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