ATMEGA128A-MU Atmel, ATMEGA128A-MU Datasheet - Page 326
ATMEGA128A-MU
Manufacturer Part Number
ATMEGA128A-MU
Description
MCU 8BIT 128K ISP FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA128A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
4KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128A-MU
Manufacturer:
Atmel
Quantity:
442
Company:
Part Number:
ATMEGA128A-MU
Manufacturer:
ATMEL
Quantity:
423
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8151H–AVR–02/11
Figure 27-6. Parallel Programming Timing, Reading Sequence (Within the Same Page) with
Note:
Table 27-5.
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
PP
XTAL1
DATA
BS1
XA0
XA1
OE
The timing requirements shown in
ing operation.
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
Timing Requirements
Parallel Programming Characteristics, V
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
t
XLOL
t
OLDV
(1)
Figure 27-4
(LOW BYTE)
DATA (Low Byte)
READ DATA
(that is t
t
BHDV
(2)
CC
DVXH
= 5V ±10%
(HIGH BYTE)
READ DATA
DATA (High Byte)
, t
XHXL
11.5
Min
200
150
150
150
150
3.7
7.5
67
67
67
67
67
67
67
0
0
0
0
, and t
t
OHDZ
ATmega128A
XLDX
Typ
LOAD ADDRESS
(LOW BYTE)
) also apply to read-
ADDR1 (Low Byte)
Max
12.5
250
10
1
5
Units
ms
ms
μA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
V
326
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