P80C557E4EFB/01,55 NXP Semiconductors, P80C557E4EFB/01,55 Datasheet - Page 28

• Manufacturer Part Number: P80C557E4EFB/01,55
• Description: IC 80C51 MCU 1024 ROMLESS 80QFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C557E4EFB/01,55

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 935263156557; P80C557E4FB; P80C557E4FB

Philips Semiconductors
6.8 Watchdog Timer T3
In addition to Timer T2 and the standard timers, a watchdog timer
(T3) consisting of an 11-bit prescaler and an 8-bit timer is also
incorporated (see Figure 27).
The timer is incremented every 1.5 ms, derived from the system
clock frequency of 16 MHz by the following:
When a timer overflow occurs, the microcontroller is reset and a
reset output pulse is generated at pin RSTOUT. Also the PLL control
register is reset.
To prevent a system reset the timer must be reloaded in time by the
application software. If the processor suffers a hardware/software
malfunction, the software will fail to reload the timer. This failure will
1999 Mar 02
Single-chip 8-bit microcontroller
f
timer
f
12
CLK
f
CLK
/12
EW
2048
Write T3
Prescaler
Clear
(11-bit)
Figure 27. Watchdog timer.
PCON.4
Internal Bus
Internal Bus
28
LOAD LOADEN
Timer T3
Clear
(8-bit)
WLE
P83C557E4/P80C557E4/P89C557E4
In the Idle state the watchdog timer and reset circuitry remain active.
produce a reset upon overflow thus preventing the processor
running out of control.
The watchdog timer can only be reloaded if the condition flag
WLE = PCON.4 has been previously set by software.
At the moment the counter is loaded the condition flag is
automatically cleared.
The time interval between the timer’s reloading and the occurrence
of a reset depends on the reloaded value. For example, this may
range from 1.5 ms to 0.375 s when using an oscillator frequency of
16 MHz.
The watchdog timer is controlled by the watchdog enable pin (EW).
A LOW level enables the watchdog timer and disables the
Power-down Mode. A HIGH level disables the watchdog timer and
enables the Power-down Mode.
LOADEN
to reset circuitry (see Figure 46)
PD
PCON.1
Product specification