P80C557E4EFB/01,55 NXP Semiconductors, P80C557E4EFB/01,55 Datasheet - Page 46

• Manufacturer Part Number: P80C557E4EFB/01,55
• Description: IC 80C51 MCU 1024 ROMLESS 80QFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C557E4EFB/01,55

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 935263156557; P80C557E4FB; P80C557E4FB

Philips Semiconductors
6.14 Reset Circuitry
The reset input pin RSTIN is connected to a Schmitt trigger for noise
reduction (see Figure 46). Is the HF-oscillator selected a Reset is
accomplished by holding the RSTIN pin HIGH for at least 2 machine
cycles (24 system clock periods). Is the PLL-oscillator selected the
RSTIN-pulse must have a width of 1 s at least, independent of the
32 kHz-oscillator is running or not (see PLL description). The CPU
responds by executing an internal reset. The RSTOUT pin
represents the signal resetting the CPU and can be used to reset
peripheral devices.
The RSTOUT level also could be high due to a Watchdog timer
overflow.
The length of the output pulse from T3 is 3 machine cycles. A pulse
of such short duration is necessary in order to recover from a
processor or system fault as fast as possible.
During Reset, ALE and PSEN output a HIGH level. In order to
perform a correct reset, this level must not be affected by external
elements.
A Reset leaves the internal registers as shown in Table 5.
The internal RAM is not affected by Reset. At power-on, the RAM
content is indeterminate.
1999 Mar 02
RSTIN
SELXTAL1
Single-chip 8-bit microcontroller
On-chip
resistor
Figure 46. On-chip Reset Configuration
R
RST
Schmitt
Trigger
PLL
OSC
MUX
Overflow
timer T3
Internal
Reset
RSTOUT
46
P83C557E4/P80C557E4/P89C557E4
6.15 Power-on Reset
An automatic Reset can be obtained by switching on V
RSTIN pin is connected to V
Figure 47.
Is the HF oscillator selected the V
ms and the capacitor should be at least 2.2 F. The decrease of the
RSTIN pin voltage depends on the capacitor and the internal resistor
R
minimum the HF-oscillator start-up time plus 2 machine cycles. Is
the PLL-oscillator selected a 0.1 F capacitor is sufficient to obtain
an automatic reset.
RST
. That voltage must remain above the lower threshold for at
Capacitor for
HF-Osc.:
PLL-Osc.: 0.1 F
2.2 F
Figure 47. Power-on Reset
V
DD
DD
via a capacitor, as shown in
DD
rise time must not exceed 10
RST
8xC557E4
R
RST
Product specification
V
DD
DD
, if the