ST7FOXK1T6TR STMicroelectronics, ST7FOXK1T6TR Datasheet - Page 18

• Manufacturer Part Number: ST7FOXK1T6TR
• Description: IC MCU 8BIT 4K FLASH 20LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FOXK1T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FOXx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 1 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Pin description
Table 2.
1. In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to V
2. Available on ST7FOXK2 only.
3. It is mandatory to connect all available V
4. BREAK2 available on ST7FOXK2 only
5. Available on ST7FOXK1 only.
Note:
18/226
30
31
32
number
implemented).
Pin
2
3
4
(HS)
PA2 (HS)/ATPWM0
Device pin description (32-pin packages) (continued)
Figure 4.
Legend / Abbreviations for
In/Output level:C
Output level: HS = 20mA high sink (on N-buffer only)
Port and control configuration:
The RESET configuration of each pin is shown in bold which is valid as long as the device is
in reset state.
PA1 (HS)/ATIC
(5)
Pin name
Input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog
Output: OD = open drain, PP = push-pull
/OCMP1_A
PA0
ATPWM2/MCO/PA4(HS)
20-pin SO and DIP package pinout
ATPWM0/PA2(HS)
ATPWM1/PA3(HS)
ATPWM3/PA5(HS)
I2CDATA/PA6(HS)
(2)
I2CCLK/PA7(HS)
T
= CMOS 0.3V
ATIC/PA1(HS)
I/O
I/O
I/O
DD
RESET
C
C
C
and V
Level
T
T
T
Table
PC6
V
SS
DDA
HS
HS
HS
(5)
DD
3: Type: I = input, O = output, S = supply
pins to the supply voltage and all V
/0.7V
1
2
3
4
5
6
7
8
9
10
x
x
x
ei2
ei0
DD
Input
with input trigger
ei0
ei2
ei2
ei1
Port/control
20
19
18
17
16
15
14
13
12
11
PC4/LTIC
PC3/ICCCLK
PC2/ICCDATA
PB5/AIN5
PB4/AIN4
PB3/AIN3
PB2/AIN2
PB1/AIN1/CLKIN
PB0/AIN0
V
DD
ST7FOXF1, ST7FOXK1, ST7FOXK2
Output
x
x
x
SS
(HS) 20mA high sink capability
eix
x
x
x
and V
associated external interrupt vector
Port A0 (HS)
function
Port A1
Port A2
reset)
SSA
(after
Main
(HS)
(HS)
DD
Output Compare 1
pins to ground.
are not
(5)
Alternate
ATPWM0
function
/ Timer A
ATIC