ST7FOXK1T6TR STMicroelectronics, ST7FOXK1T6TR Datasheet - Page 211

• Manufacturer Part Number: ST7FOXK1T6TR
• Description: IC MCU 8BIT 4K FLASH 20LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FOXK1T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FOXx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 1 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST7FOXF1, ST7FOXK1, ST7FOXK2
13
13.1
13.1.1
Device configuration and ordering information
This device is available for production in user programmable version (Flash).
ST7FOX XFlash devices are shipped to customers with a default program memory content
(FFh).
Option bytes
The two option bytes allow the hardware configuration of the microcontroller to be selected.
The option bytes can be accessed only in programming mode (for example using a standard
ST7 programming tool).
Option byte 1
Bits 7:6 = CKSEL[1:0] Start-up clock selection.
Table 92.
Bits 5:3 = Reserved, must always be 1.
Bit 2 = LVD Low Voltage Detection selection.
Bit 1 = WDG SW Hardware or software watchdog
Bit 0 = WDG HALT Watchdog Reset on Halt
These bits are used to select the startup frequency. By default, the internal RC is
selected.
This option bit enables the low voltage detection block (LVD).
0: LVD on
1: LVD off (default value)
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
This option bit determines if a Reset is generated when entering Halt mode while the
Watchdog is active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
Startup clock selection
External crystal/ceramic resonator
Internal RC as Startup Clock
AWU RC as a Startup Clock
Configuration
External Clock
Device configuration and ordering information
CKSEL1
0
0
1
1
CKSEL0
0
1
0
1
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