Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 117
Z8F0813HJ005EG
Manufacturer Part Number
Z8F0813HJ005EG
Description
IC Z8 ENCORE MCU FLASH 8K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0813PH005SC.pdf
(227 pages)
Specifications of Z8F0813HJ005EG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-4182
Z8F0813HJ005EG
Z8F0813HJ005EG
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R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
UART Control 0 and Control 1 Registers
TEN
R/W
R
0
7
Reserved—Must be 0.
NEWFRM—Status bit denoting the start of a new frame. Reading the UART Receive
Data register resets this bit to 0.
0 = The current byte is not the first data byte of a new frame.
1 = The current byte is the first data byte of a new frame.
MPRX—Multiprocessor Receive
Returns the value of the most recent multiprocessor bit received. Reading from the UART
Receive Data register resets this bit to 0.
The UART Control 0 and Control 1 registers (Tables 66 and 67) configure the properties
of the UART’s transmit and receive operations. The UART Control registers must not be
written while the UART is enabled.
TEN—Transmit Enable
This bit enables or disables the transmitter. The enable is also controlled by the CTS signal
and the CTSE bit. If the CTS signal is low and the CTSE bit is 1, the transmitter is
enabled.
0 = Transmitter disabled.
1 = Transmitter enabled.
REN—Receive Enable
This bit enables or disables the receiver.
0 = Receiver disabled.
1 = Receiver enabled.
CTSE—CTS Enable
0 = The CTS signal has no effect on the transmitter.
1 = The UART recognizes the CTS signal as an enable control from the transmitter.
REN
R/W
R
6
0
Table 65. UART Status 1 Register (U0STAT1)
Table 66. UART Control 0 Register (U0CTL0)
CTSE
R/W
R
5
0
P R E L I M I N A R Y
PEN
R/W
R
0
4
F44H
F42H
R/W
PSEL
R/W
3
0
Z8 Encore!
R/W
SBRK
R/W
0
2
Product Specification
STOP
®
R/W
R
1
0
Z8F0823 Series
LBEN
R/W
R
0
0
UART
100
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