Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 70

IC Z8 ENCORE MCU FLASH 8K 28SSOP

Z8F0813HJ005EG

Manufacturer Part Number
Z8F0813HJ005EG
Description
IC Z8 ENCORE MCU FLASH 8K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0813HJ005EG

Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-4182
Z8F0813HJ005EG
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
Interrupt Request 1 Register
Reserved
R/W
0
7
Reserved—Must be 0.
T1I—Timer 1 Interrupt Request
0 = No interrupt request is pending for Timer 1.
1 = An interrupt request from Timer 1 is awaiting service.
T0I—Timer 0 Interrupt Request
0 = No interrupt request is pending for Timer 0.
1 = An interrupt request from Timer 0 is awaiting service.
U0RXI—UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service.
U0TXI—UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service.
ADCI—ADC Interrupt Request
0 = No interrupt request is pending for the Analog-to-Digital Converter.
1 = An interrupt request from the Analog-to-Digital Converter is awaiting service.
The Interrupt Request 1 (IRQ1) register (Table 35) stores interrupt requests for both vec-
tored and polled interrupts. When a request is presented to the interrupt controller, the cor-
responding bit in the IRQ1 register becomes 1. If interrupts are globally enabled (vectored
interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If interrupts
are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt Request 1
register to determine if any interrupt requests are pending.
R/W
T1I
6
0
Table 34. Interrupt Request 0 Register (IRQ0)
R/W
T0I
5
0
P R E L I M I N A R Y
U0RXI
R/W
0
4
FC0H
U0TXI
R/W
3
0
Reserved Reserved
Z8 Encore!
R/W
0
2
Product Specification
®
R/W
1
0
Z8F0823 Series
Interrupt Controller
ADCI
R/W
0
0
53

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