ST72C254G2M6 STMicroelectronics, ST72C254G2M6 Datasheet - Page 26

• Manufacturer Part Number: ST72C254G2M6
• Description: IC MCU 8BIT 8K FLASH SOIC-28
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C254G2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: ST7
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: ST72C2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDT1-DVP2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition

ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
INTERRUPTS (Cont’d)
Figure 15. Interrupt Processing Flowchart
Table 5. Interrupt Mapping
Note
1. Configurable by option byte.
26/141
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
FROM RESET
TIMER A
TIMER B
Source
RESET
Block
TRAP
CSS
SPI
ei0
ei1
I²C
Reset
Software Interrupt
External Interrupt Port A7..0 (C5..0
External Interrupt Port B7..0 (C5..0
Clock Security System Interrupt
SPI Peripheral Interrupts
TIMER A Peripheral Interrupts
Not used
TIMER B Peripheral Interrupts
Not used
Not used
Not used
Not used
I²C Peripheral Interrupt
Not Used
Not Used
EXECUTE INSTRUCTION
Description
RESTORE PC, X, A, CC FROM STACK
THIS CLEARS I BIT BY DEFAULT
FETCH NEXT INSTRUCTION
N
I BIT SET?
1
1
)
)
IRET?
Y
Y
Register
I2CSRx
SPISR
CRSR
Label
TASR
TBSR
N/A
N
LOAD PC FROM INTERRUPT VECTOR
Priority
Highest
Lowest
Priority
Priority
Order
N
STACK PC, X, A, CC
INTERRUPT
PENDING?
SET I BIT
HALT
from
Exit
yes
yes
no
no
no
no
Y
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Address
Vector