ST10F276Z5Q3TR STMicroelectronics, ST10F276Z5Q3TR Datasheet - Page 69

• Manufacturer Part Number: ST10F276Z5Q3TR
• Description: MCU 16BIT 832KBIT FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5Q3TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 64MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-QFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Interface Type: CAN, I2C
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F276Z5
5.6.10
5.6.11
5.6.12
EMUCON register
EMUCON (FE0Ah / 05h)
Table 37.
Internal decoding of test modes
The test mode decoding logic is located inside the ST10F276Z5 Bus Controller.
The decoding is as follows:
●
●
●
The other configurations select ST internal test modes.
Example
In the following example, Alternate Boot mode works as follows: on rising edge of RSTIN
pin, the reset configuration is latched:
●
●
●
ABM
15
Alternate Boot mode decoding: (P0L.5 & P0L.4)
Standard Bootstrap decoding: (P0L.5 & P0L.4)
Normal operation: (P0L.5 & P0L.4)
If Bootstrap Loader mode is not enabled (P0L[5..4] = ‘11’), the device hardware
proceeds with a standard hardware reset procedure.
If standard Bootstrap Loader is enabled (P0L[5..4] = ‘10’), the standard ST10 Bootstrap
Loader is enabled and a variable is cleared to indicate that ABM is not enabled.
If Alternate Boot mode is selected (P0L[5..4] = ‘01’), then, depending on signatures
integrity checks, a predefined reset sequence is activated.
Bit
14
ABM bit description
13
ABM Flag (or TMOD3)
‘0’: Alternate Boot mode is not selected by reset configuration on P0L[5..4]
‘1’: Alternate Boot mode is selected by reset configuration on P0L[5..4]: This bit is
set if P0L[5..4] = ‘01’ during hardware reset.
12
11
-
-
10
9
SFR
8
7
Function
6
ABM
R
5
4
3
Bootstrap loader
Reset value: - xxh:
2
-
1
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