S9S08AW16AE0CFT Freescale Semiconductor, S9S08AW16AE0CFT Datasheet - Page 140

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S9S08AW16AE0CFT

Manufacturer Part Number
S9S08AW16AE0CFT
Description
MCU 16K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08AW16AE0CFT

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD. POR, PWM, WDT
Number Of I /o
38
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08AW16AE0CFT
Manufacturer:
FREESCALE
Quantity:
20 000
Chapter 8 Internal Clock Generator (S08ICGV4)
8.3.6
8.4
This section provides a functional description of each of the five operating modes of the ICG. Also
discussed are the loss of clock and loss of lock errors and requirements for entry into each mode. The ICG
is very flexible, and in some configurations, it is possible to exceed certain clock specifications. When
using the FLL, configure the ICG so that the frequency of ICGDCLK does not exceed its maximum value
to ensure proper MCU operation.
140
Reset
Reset:
Field
Field
TRIM
POR
FLT
7:0
7
W
W
R
R
U = Unaffected by MCU reset
Functional Description
ICG Trim Register (ICGTRM)
Filter Value — The FLT bits indicate the current filter value, which controls the DCO frequency. The FLT bits are
read only except when the CLKS bits are programmed to self-clocked mode (CLKS = 00). In self-clocked mode,
any write to ICGFLTU updates the current 12-bit filter value. Writes to the ICGFLTU register will not affect FLT if
a previous latch sequence is not complete. The filter registers show the filter value (FLT).
ICG Trim Setting — The TRIM bits control the internal reference generator frequency. They allow a ±25%
adjustment of the nominal (POR) period. The bit’s effect on period is binary weighted (i.e., bit 1 will adjust twice
as much as changing bit 0). Increasing the binary value in TRIM will increase the period and decreasing the value
will decrease the period.
U
1
1
7
7
U
1
0
6
6
Figure 8-11. ICG Lower Filter Register (ICGFLTL)
Table 8-6. ICGFLTL Register Field Descriptions
Table 8-7. ICGTRM Register Field Descriptions
Figure 8-12. ICG Trim Register (ICGTRM)
U
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
U
0
0
4
4
Description
Description
TRIM
FLT
U
3
0
3
0
0
0
U
2
2
Freescale Semiconductor
U
0
0
1
1
U
0
0
0
0

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