S9S12P32J0MFT Freescale Semiconductor, S9S12P32J0MFT Datasheet - Page 173

• Manufacturer Part Number: S9S12P32J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P32J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.2.8.6
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
6.3.2.8.7
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
Freescale Semiconductor
Address: 0x002D
Address: 0x002E
Bits[15:8]
Bits[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
Bit 15
Comparator Data High Compare Bits— The Comparator data high compare bits control whether the selected
comparator compares the data bus bits [15:8] to a logic one or logic zero. The comparator data compare bits are
only used in comparison if the corresponding data mask bit is logic 1. This register is available only for
comparator A. Data bus comparisons are only performed if the TAG bit in DBGACTL is clear.
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
Bit 7
Comparator Data Low Compare Bits — The Comparator data low compare bits control whether the selected
comparator compares the data bus bits [7:0] to a logic one or logic zero. The comparator data compare bits are
only used in comparison if the corresponding data mask bit is logic 1. This register is available only for
comparator A. Data bus comparisons are only performed if the TAG bit in DBGACTL is clear
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
0
0
7
7
Debug Comparator Data Low Register (DBGADL)
Debug Comparator Data High Mask Register (DBGADHM)
Figure 6-21. Debug Comparator Data High Mask Register (DBGADHM)
Figure 6-20. Debug Comparator Data Low Register (DBGADL)
Bit 14
Bit 6
0
0
6
6
Table 6-28. DBGADH Field Descriptions
Table 6-29. DBGADL Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
Bit 13
Bit 5
0
0
5
5
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
0
0
2
2
S12S Debug Module (S12SDBGV2)
Bit 1
Bit 9
0
0
1
1
Bit 0
Bit 8
0
0
0
0
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