S9S12P32J0MFT Freescale Semiconductor, S9S12P32J0MFT Datasheet - Page 429

• Manufacturer Part Number: S9S12P32J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P32J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.3
This section describes the memory map and registers for the Flash module. Read data from unimplemented
memory space in the Flash module is undefined. Write access to unimplemented or reserved memory space
in the Flash module will be ignored by the Flash module.
13.3.1
The S12 architecture places the P-Flash memory between global addresses
shown in Table
The FPROT register, described in
accidental program or erase.
0x3_8000 in the Flash memory (called the lower region), one growing downward from global address
0x3_FFFF in the Flash memory (called the higher region), and the remaining addresses in the Flash
memory, can be activated for protection.
are shown in the P-Flash memory map. The higher address region is mainly targeted to hold the boot loader
code since it covers the vector space. Default protection settings as well as security information that allows
the MCU to restrict access to the Flash module are stored in the Flash configuration field as described in
Table
Freescale Semiconductor
1. 0x3FF08-0x3_FF0F form a Flash phrase and must be programmed in a single command write sequence. Each byte in
0x3_FF08-0x3_FF0B
the 0x3_FF08 - 0x3_FF0B reserved field should be programmed to 0xFF.
0x3_FF00-0x3_FF07
13-3.
Global Address
0x3_FF0C
0x3_FF0D
0x3_FF0E
0x3_FF0F
Memory Map and Registers
Module Memory Map
13-2.The P-Flash memory map is shown in
1
1
1
1
0x2_0000 – 0x3_FFFF
(1)
Global Address
(Bytes)
Size
Three separate memory regions, one growing upward from global address
8
4
1
1
1
1
Table 13-2.
Section
S12P-Family Reference Manual, Rev. 1.13
Table 13-3. Flash Configuration Field
Backdoor Comparison Key
Refer to
Section 13.5.1, “Unsecuring the MCU using Backdoor Key
Reserved
P-Flash Protection byte
Refer to
D-Flash Protection byte
Refer to
Flash Nonvolatile byte
Refer to
Flash Security byte
Refer to
The Flash memory addresses covered by these protectable regions
13.3.2.9, can be set to protect regions in the Flash memory from
(Bytes)
128 K
Section 13.4.5.11, “Verify Backdoor Access Key
Section 13.3.2.9, “P-Flash Protection Register (FPROT)”
Section 13.3.2.10, “D-Flash Protection Register (DFPROT)”
Section 13.3.2.16, “Flash Option Register (FOPT)”
Section 13.3.2.2, “Flash Security Register (FSEC)”
Size
P-Flash Memory Addressing
P-Flash Block
Contains Flash Configuration Field
(see
Table
.
.
Figure
13-3)
Description
Description
13-2.
128 KByte Flash Module (S12FTMRC128K1V1)
0x2_0000 and 0x3_FFFF as
Command,” and
Access”
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