MC9S12P64CFT Freescale Semiconductor, MC9S12P64CFT Datasheet - Page 135
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MC9S12P64CFT
Manufacturer Part Number
MC9S12P64CFT
Description
MCU 16BIT 64K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P64CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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5.3.2.1
Register Global Address 0x3_FF01
1. ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but
2. UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,
Freescale Semiconductor
Special Single-Chip Mode
0x3_FF0A
0x3_FF0B
0x3_FF05
0x3_FF06
0x3_FF07
0x3_FF08
0x3_FF09
Address
fully erased (Flash). This is because the ENBDM bit is set by the standard BDM firmware before a BDM command can be fully
transmitted and executed.
else it is 0 and can only be read if not secure (see also bit description).
Global
All Other Modes
BDMCCR
Reserved
Reserved
BDMPPR
Reserved
Reserved
Reserved
Register
BDM Status Register (BDMSTS)
Name
Reset
W
R
W
W
W
W
W
W
W
R
R
R
R
R
R
R
ENBDM
0
CCR7
BPAE
0
0
7
(1)
Bit 7
Figure 5-2. BDM Register Summary (continued)
X
X
0
0
0
0
Figure 5-3. BDM Status Register (BDMSTS)
= Unimplemented, Reserved
= Always read zero
S12P-Family Reference Manual, Rev. 1.13
BDMACT
= Unimplemented, Reserved
= Indeterminate
CCR6
1
0
6
X
6
0
0
0
0
0
CCR5
0
0
0
5
X
5
0
0
0
0
0
SDV
CCR4
0
0
4
4
X
0
0
0
0
0
TRACE
CCR3
BPP3
0
0
3
X
3
0
0
0
0
0
Background Debug Module (S12SBDMV1)
= Implemented (do not alter)
= Implemented (do not alter)
= Always read zero
CCR2
BPP2
0
0
0
2
X
2
0
0
0
0
UNSEC
CCR1
BPP1
0
1
0
(2)
X
1
0
0
0
0
CCR0
BPP0
Bit 0
X
0
0
0
0
0
0
0
0
135
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