MC9S12P64CFT Freescale Semiconductor, MC9S12P64CFT Datasheet - Page 169
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MC9S12P64CFT
Manufacturer Part Number
MC9S12P64CFT
Description
MCU 16BIT 64K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P64CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Read: DBGACTL if COMRV[1:0] = 00
Write: DBGACTL if COMRV[1:0] = 00 and DBG not armed
Freescale Semiconductor
Address: 0x0028
Address: 0x0028
Address: 0x0028
(Comparators
(Comparators
Reset
Reset
Reset
A and B)
A and B)
Field
SZE
W
W
W
SZ
R
R
R
DBGBCTL if COMRV[1:0] = 01
DBGCCTL if COMRV[1:0] = 10
DBGBCTL if COMRV[1:0] = 01 and DBG not armed
DBGCCTL if COMRV[1:0] = 10 and DBG not armed
7
6
SZE
SZE
0
0
0
0
7
7
7
Figure 6-14. Debug Comparator Control Register DBGBCTL (Comparator B)
Figure 6-15. Debug Comparator Control Register DBGCCTL (Comparator C)
Figure 6-13. Debug Comparator Control Register DBGACTL (Comparator A)
Size Comparator Enable Bit — The SZE bit controls whether access size comparison is enabled for the
associated comparator. This bit is ignored if the TAG bit in the same register is set.
0 Word/Byte access size is not used in comparison
1 Word/Byte access size is used in comparison
Size Comparator Value Bit — The SZ bit selects either word or byte access size in comparison for the
associated comparator. This bit is ignored if the SZE bit is cleared or if the TAG bit in the same register is set.
0 Word access size is compared
1 Byte access size is compared
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
SZ
SZ
0
0
0
0
6
6
6
Table 6-22. DBGXCTL Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
TAG
TAG
TAG
0
0
0
5
5
5
BRK
BRK
BRK
0
0
0
4
4
4
Description
RW
RW
RW
0
0
0
3
3
3
RWE
RWE
RWE
0
0
0
2
2
2
S12S Debug Module (S12SDBGV2)
NDB
0
0
0
0
0
1
1
1
COMPE
COMPE
COMPE
0
0
0
0
0
0
169
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