MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 137

• Manufacturer Part Number: MC908GR32AVFAE
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

12.3.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the eight port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
PTAPUE7–PTAPUE0 — Port A Input Pullup Enable Bits
Freescale Semiconductor
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
PTAPUE
These writable bits are software programmable to enable pullup devices on an input port bit.
Bit
X
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
1
0
Address:
Pullup or pulldown resistors are automatically selected for keyboard
interrupt pins depending on the bit settings in the keyboard interrupt polarity
register (INTKBIPR) see
DDRA
Reset:
Read:
Write:
Bit
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
0
0
1
Figure 12-5. Port A Input Pullup Enable Register (PTAPUE)
DD
PTAPUE7
$000D
by internal pullup device
Bit 7
0
PTA
X
Bit
X
X
(1)
PTAPUE6
6
0
Input, Hi-Z
Input, V
Table 12-2. Port A Pin Functions
I/O Pin
Output
Mode
PTAPUE5
9.7.3 Keyboard Interrupt Polarity
DD
5
0
(2)
(4)
PTAPUE4
NOTE
Accesses to DDRA
4
0
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
Read/Write
PTAPUE3
3
0
PTAPUE2
2
0
PTA7–PTA0
Register.
Read
PTAPUE1
Pin
Pin
1
0
Accesses to PTA
PTAPUE0
Bit 0
0
PTA7–PTA0
PTA7–PTA0
PTA7–PTA0
Write
Port A
(3)
(3)
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