MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 282
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC908GR32AVFAE
Manufacturer Part Number
MC908GR32AVFAE
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR32AVFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR32AVFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Electrical Specifications
282
Pullup/pulldown resistors (as input only)
Capacitance
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25°C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
10. Power supply must maintain regulation within operating V
11. Pullups and pulldowns are disabled.
12. Maximum is highest voltage that POR is guaranteed.
13. Maximum is highest voltage that POR is possible.
14. If minimum V
7. This parameter is characterized and not tested on each device.
8. All functional non-supply pins are internally clamped to V
9. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
Ports PTA7/KBD7–PTA0/KBD0, PTC6–PTC0,
Ports (as input or output)
(V
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
I
configured as inputs. Typical values at midpoint of voltage range, 25°C only.
rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
V
PTD7/T2CH1–PTD0/SS
DD
calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.
conditions. If positive injection current (V
result in external power supply going out of regulation. Ensure external V
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock
is present, or if clock rate is very low (which would reduce overall power consumption).
TRIPF
DD
DD
. Measured with CGM and LVI enabled.
= 3.3 Vdc ± 10%, V
is reached.
DD
DD
DD
+ V
measured using external square wave clock source (f
with TBM enabled is measured using an external square wave clock source (f
is measured with OSC1 = V
HYS
DD
DD
. Measured with all modules enabled.
= V
(13)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
(12)
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
Characteristic
TRIPR
measured using external square wave clock source (f
(14)
)
SS
= 0 Vdc, T
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
(1)
SS
A
= T
. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all outputs. All ports
in
L
A
> V
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
(min) to T
DD
) is greater than I
A
(max), unless otherwise noted
SS
DD
V
Symbol
V
V
and V
PORRST
range during instantaneous and operating maximum current
R
V
V
V
C
R
TRIPR
OSC
TRIPF
C
POR
POR
HYS
TST
Out
PU
In
DD
= 16 MHz). All inputs 0.2 V from rail. No dc loads. Less
DD
, the injection current may flow out of V
.
DD
V
OSC
DD
load will shunt current greater than maximum
2.35
0.02
Min
2.4
20
—
—
—
0
0
= 16 MHz). All inputs 0.2 V from rail. No dc
+ 2.5
OSC
Typ
2.66
100
700
2.6
45
—
—
—
—
—
= 4 MHz). All inputs 0.2 V from
(2)
Freescale Semiconductor
V
DD
Max
100
800
2.8
2.9
65
12
—
—
8
+ 4.0
DD
and could
V/ms
Unit
mV
mV
mV
kΩ
pF
V
V
V
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