C8051F343-GQ Silicon Laboratories Inc, C8051F343-GQ Datasheet - Page 252

IC 8051 MCU FLASH 32K 32LQFP

C8051F343-GQ

Manufacturer Part Number
C8051F343-GQ
Description
IC 8051 MCU FLASH 32K 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheets

Specifications of C8051F343-GQ

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Interface Type
I2C, SMBus, SPI, UART, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
Package
32LQFP
Device Core
8051
Family Name
C8051F34x
Maximum Speed
48 MHz
Data Rom Size
128 B
A/d Bit Size
10 bit
A/d Channels Available
17
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1301

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F343-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F343-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
When T3SPLIT = ‘1’, the Timer 3 registers (TMR3H and TMR3L) act as two 8-bit counters. Each counter
counts up independently and overflows from 0xFF to 0x00. Each time a capture event is received, the con-
tents of the Timer 3 registers are latched into the Timer 3 Reload registers (TMR3RLH and TMR3RLL). A
Timer 3 interrupt is generated if enabled.
252
External Clock / 8
SYSCLK / 12
H
T
F
3
T
F
3
L
TMR3CN
T
F
3
L
E
N
C
T
3
E
S
P
T
3
L
T
I
Figure 21.11. Timer 3 Capture Mode (T3SPLIT = ‘1’)
T
R
3
T
3
C
S
S
C
T
3
X
L
K
0
1
SYSCLK
0
1
1
0
T
M
H
3
M
T
3
L
CKCON
M
H
T
2
M
T
2
L
TR3
T
M
1
M
T
0
Rev. 1.3
C
S
A
1
USB Start-of-Frame (SOF)
S
C
A
0
Low-Frequency Oscillator
TCLK
TCLK
Falling Edge
TMR3RLH
TMR3RLL
TMR3H
TMR3L
Capture
Capture
To ADC
T3CSS
0
1
Enable
Interrupt

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