R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 118

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
10.7
10.7.1
10.7.2
10.7.3
10.7.4
When entering stop mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and the
CM10 bit in the CM1 register to 1 (stop mode). An instruction queue pre-reads 4 bytes from the instruction
which sets the CM10 bit to 1 (stop mode) and the program stops.
Insert at least 4 NOP instructions following the JMP.B instruction after the instruction which sets the CM10 bit
to 1.
• Program example to enter stop mode
When entering wait mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and
execute the WAIT instruction. An instruction queue pre-reads 4 bytes from the WAIT instruction and the
program stops. Insert at least 4 NOP instructions after the WAIT instruction.
• Program example to execute the WAIT instruction
Since the oscillation stop detection function cannot be used if the XIN clock frequency is 2 MHz or below, set
bits OCD1 to OCD0 to 00b.
Ask the manufacturer of the oscillator to specify the best oscillation circuit constants for your system.
To use this MCU with supply voltage below VCC = 2.7 V, it is recommended to set the CM11 bit in the CM1
register to 1 (on-chip feedback resistor disabled), the CM15 bit to 1 (high drive capacity), and connect the
feedback resistor to the chip externally.
Notes on Clock Generation Circuit
Feb 29, 2008
Stop Mode
Wait Mode
Oscillation Stop Detection Function
Oscillation Circuit Constants
Page 99 of 485
LABEL_001 :
BCLR
BSET
FSET
BSET
JMP.B
NOP
NOP
NOP
NOP
BCLR
FSET
WAIT
NOP
NOP
NOP
NOP
1,FMR0
0,PRCR
I
0,CM1
LABEL_001
1,FMR0
I
; CPU rewrite mode disabled
; Protect disabled
; Enable interrupt
; Stop mode
; CPU rewrite mode disabled
; Enable interrupt
; Wait mode
10. Clock Generation Circuit