R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 516

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
1.00
REVISION HISTORY
May 31, 2006
Date
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Figure 14.22 TRBIOC Register in Programmable Wait One-Shot
14.2.5 Notes on Timer RB;
Table 14.12 Pin Functions TRDIOA0/TRDCLK(P2_0) revised
Figure 14.86 TRDFCR Register in Complementary PWM Mode NOTES
Generation Mode
Figure 14.23 Operating Example of Programmable Wait One-Shot
Generation Mode revised
Table 14.20 Pin Functions INT0(P4_5) revised
Figure 14.33 TRDFCR Register in Input Capture Function NOTE2 revised
Figure 14.47 TRDFCR Register in Output Compare Function NOTE2 revised
Figure 14.63 TRDFCR Register in PWM Mode NOTE2 revised
Table 14.29 Reset Synchronous PWM Mode Specifications revised
Figure 14.75 TRDFCR Register in Reset Synchronous PWM Mode
NOTES 1 and 3 revised
Figure 14.78 Registers TRDSR0 to TRDSR1 in Reset Synchronous
PWM Mode revised
Table 14.30 TRDGRji Register Functions in Reset Synchronous PWM
Mode revised
1 and 4 revised
14.3.9 Complementary PWM Mode;
Table 14.33 Specifications of PWM3 Mode revised
Figure 14.98 TRDFCR Register in PWM3 Mode NOTE2 revised
Table 14.34 TRDGRji Register Functions in PWM3 Mode revised,
14.3.10 PWM3 Mode; “Registers TRDGRC0, ... and BFD1.” added
14.3.12.1 TRDSTR Register (i = 0 or 1);
14.3.12.6 Reset Synchronous PWM Mode; Change procedure (2) revised
14.3.12.7 Complementary PWM Mode;
14.3.12.8 PWM3 Mode deleted
14.4 Timer RE; “The count source for timer RE ... operations.” added
Figure 14.112 Block Diagram of Real-Time Clock Mode revised
R8C/24 Group, R8C/25 Group Hardware Manual
(Figure 14.25 Registers TRBIOC and TRBMR in Programmable Wait
One-Shot Generation Mode TRBMR register deleted)
“ • ... Timer RB starts counting at the first ... 1 (during count).” deleted
“ • When the TSTOP bit in the TRBCR register ... immediately stops.
“Since a value cannot be written to ... BFC1, and BFD1.” added
“ • Table 14.36 lists the TRDIOji (j = A, B, C, ... timer RD output.” added
•Change bits CMD1 to CMD0 in the TRDFCR register in the ... ;
•Do not write to ... ; “However, set to the TRDGRD0, ... BFD1.” added
Change procedure: When stopping complementary ... (1) and (2) revised
• If the TOSST bit or the TOSSP bit ... also be set to 0 or 1.” added
Change procedure: When setting to complementary ... (2) ,
C - 12
Description
Summary