MC9S12XEQ512CAL Freescale Semiconductor, MC9S12XEQ512CAL Datasheet - Page 1210

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MC9S12XEQ512CAL

Manufacturer Part Number
MC9S12XEQ512CAL
Description
MCU 16BIT 512K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ512CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
32KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Appendix A Electrical Characteristics
1
2
3
4
5
6
1210
Num
10
11
12
13
14
15
16
17
18
19
20
The values for thermal resistance are achieved by package simulations for the 9S12XEP100 die.
Measured per JEDEC JESD51-8. Measured on top surface of the board near the package.
Junction to ambient thermal resistance, θ
horizontal configuration in natural convection.
Junction to ambient thermal resistance, θ
horizontal configuration in natural convection.
Junction to case thermal resistance was simulated to be equivalent to the measured values using the cold plate technique with
the cold plate temperature used as the “case” temperature. This basic cold plate measurement technique is described by
MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when the package
is being used with a heat sink.
Thermal characterization parameter Ψ
case as defined in JESD51-2. Ψ
enviroment.
1
2
3
4
5
6
7
8
9
C
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Thermal resistance 208MAPBGA, single sided PCB
Thermal resistance208MAPBGA, double sided PCB
with 2 internal planes
Junction to Board 208MAPBGA
Junction to Case 208MAPBGA
Junction to Package Top 208MAPBGA
Thermal resistance LQFP144, single sided PCB
Thermal resistance LQFP144, double sided PCB
with 2 internal planes
Junction to Board LQFP 144
Junction to Case LQFP 144
Junction to Package Top LQFP144
Thermal resistance LQFP112, single sided PCB
Thermal resistance LQFP112, double sided PCB
with 2 internal planes
Junction to Board LQFP112
Junction to Case LQFP112
Junction to Package Top LQFP112
Thermal resistance QFP 80, single sided PCB
Thermal resistance QFP 80, double sided PCB
with 2 internal planes
Junction to Board QFP 80
Junction to Case QFP 80
Junction to Package Top QFP 80
Table A-5. Thermal Package Characteristics (9S12XEP100)
3
3
4
3
JT
Rating
is a useful value to use to estimate junction temperature in a steady state customer
MC9S12XE-Family Reference Manual , Rev. 1.23
5
4
JT
4
is the “resistance” from junction to reference point thermocouple on top center of the
JA
JA
4
2
6
was simulated to be equivalent to the JEDEC specification JESD51-2 in a
was simulated to be equivalent to the JEDEC specification JESD51-7 in a
5
5
5
208MAPBGA
LQFP144
LQFP112
3
QFP80
3
3
2
Symbol
Ψ
Ψ
Ψ
Ψ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
JC
JC
JC
JC
JA
JA
JB
JA
JA
JB
JA
JA
JB
JA
JA
JB
JT
JT
JT
JT
Min
1
Typ
Freescale Semiconductor
Max
7.4
53
31
20
41
32
22
43
32
22
45
33
19
11
9
2
3
7
3
3
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit

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