M30263F6AFP#U5A Renesas Electronics America, M30263F6AFP#U5A Datasheet - Page 217

• Manufacturer Part Number: M30263F6AFP#U5A
• Description: IC M16C/26A MCU FLASH 42-SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30263F6AFP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 33
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
1
. v
J
6
Figure 14.1.6.3 ADTRGCON Register in Simultaneous Sample Sweep Mode
Table 14.1.6.2 Trigger Select Bit Setting in Simultaneous Sample Sweep Mode
NOTE:
0
C
TRG
2
9
2 /
0 .
0
1
1
B
1
1. A count can be started for Timer B2, Timer B2 interrupt generation frequency setting counter underflow or
2. Select Timer B2 or Timer B2 interrupt generation frequency setting counter using the TB2SEL bit in the
0
0
6
2
the INT5 pin falling edge as count start conditions of Timer B0.
TB2SC register.
A
0
F
A/D trigger control register
b7
2
G
e
NOTE:
0 -
b
o r
TRG1
b6
1 .
2
1. If ADTRGCON register is rewritten during A/D conversion, the conversion result will be indeterminate.
1
0
u
-
-
0
, 5
b5
0
p
2
(
0
b4
M
0
HPTRG0
1
7
b3
0
6
C
1
0
page 198
0
-
b2
2 /
6
0
b1
, A
b0
1
Software trigger
AD
Timer B2 or Timer B2 interrupt generation frequency
setting counter underflow (2)
M
Timer B0 underflow (1)
1
Bit symbol
TRG
f o
6
HPTRG0
HPTRG1
(b7-b4)
C
SSE
DTE
3
2 /
2
Symbol
ADTRGCON
(1)
9
6
TRIGGER
, B
M
AN0 Trigger Select Bit
A/D Operation Mode
Select Bit 2
A/D Operation Mode
Select Bit 3
AN1 Trigger Select Bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
1
6
C
2 /
Bit name
6
) T
Address
03D2
16
Refer to Table 14.1.6.2 Trigger Select
Bit Setting in Simultaneous Sample
Sweep Mode
Set to "0" in simultaneous sample
sweep mode
0 : Any mode other than delayed trigger
1 : Simultaneous sample sweep mode
or delayed trigger mode 0, 1
mode 0,1
After reset
00
16
Function
14. A/D Converter
RW
RW
RW
RW
RW