DF36034GFPJV Renesas Electronics America, DF36034GFPJV Datasheet - Page 318
![MCU 3/5V 32K J TEMP PB-FREE 64LQ](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF36034GFPJV
Manufacturer Part Number
DF36034GFPJV
Description
MCU 3/5V 32K J TEMP PB-FREE 64LQ
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of DF36034GFPJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 14 Serial Communication Interface 3 (SCI3)
Rev. 4.00 Mar. 15, 2006 Page 284 of 556
REJ09B0026-0400
Figure 14.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
Yes
No
No
Clear TE and RE bits in SCR to 0
Start transmission/reception
Write transmit data to TDR
Read receive data in RDR
Read RDRF flag in SSR
Read TDRE flag in SSR
Read OER flag in SSR
All data received?
RDRF = 1
TDRE = 1
OER = 1
<End>
Yes
Yes
No
No
(Clocked Synchronous Mode)
Error processing
Yes
[1]
[2]
[3]
[4]
[1] Read SSR and check that the TDRE
[2] Read SSR and check that the RDRF
[3] To continue serial transmission/
[4] If an overrun error occurs, read the
For overrun error processing, see
flag is set to 1, then write transmit
data to TDR.
TDRE flag is automatically cleared to
0.
flag is set to 1, then read the receive
data in RDR.
RDRF flag is automatically cleared to
0.
reception, before the MSB (bit 7) of
the current frame is received, finish
reading the RDRF flag, reading RDR.
Also, before the MSB (bit 7) of the
current frame is transmitted, read 1
from the TDRE flag to confirm that
writing is possible. Then write data to
TDR.
TDRE flag is automatically cleared to
0. When data is read from RDR, the
RDRF flag is automatically cleared to
0.
OER flag in SSR, and after
performing the appropriate error
processing, clear the OER flag to 0.
Transmission/reception cannot be
resumed if the OER flag is set to 1.
figure 14.13.
When data is written to TDR, the
When data is read from RDR, the
When data is written to TDR, the
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