DF36054FPJ Renesas Electronics America, DF36054FPJ Datasheet - Page 417

• Manufacturer Part Number: DF36054FPJ
• Description: MCU 3/5V 32K J-TEMP 64-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054FPJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36054FPJ; HD64F36054FPJ

17.3
17.3.1
The oscillation frequency of the on-chip oscillator ranges from 64 kHz to 850 kHz. To make a
subclock with expected frequency by dividing the oscillation frequency, ROPCR must be
configured by using following (1) to (6) formulas. The SBTPS division ratio is set as follows.
1. When the OSCEB bit in SBTCTL is set to 1, SBTPS counts two system clock cycles from the
2. SBTPS halts counting at the third falling edge of PSCIN, the PCEF flag in SBTCTL is set to 1,
3. By using this count value, the division ratio of the on-chip oscillator is determined and the
4. SBTPS starts supplying clocks and SBTDCNT starts counting down by clearing the PCEF flag
first falling edge of PSCIN to the third falling edge.
and then the SBTPS value is transferred to ROPCR.
value is set in ROPCR.
in SBTCTL to 0.
System clock ( )
Subclock ( w)
PCEF flag
Operation
SBTPS Division Ratio Setting
ROPCR
PSCIN
OSCEB is set
H'FF
t
Figure 17.2 Timing for On-Chip Oscillator
SBTPS counting halts
PCEF is set
Count value is transferred
to ROPCR
2T
RO
n
ROPCR is set
PCEF is cleared
Supplying subclocks starts
SBTDCNT counting starts
Rev. 4.00 Mar. 15, 2006 Page 383 of 556
Section 17 Subsystem Timer (Subtimer)
m
REJ09B0026-0400