M30800SFP-BL#D5 Renesas Electronics America, M30800SFP-BL#D5 Datasheet - Page 118

• Manufacturer Part Number: M30800SFP-BL#D5
• Description: MCU 3/5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#D5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
1
v
J
6
Figure 13.12 Example of how a 16-bit pulse width modulator operates
Figure 13.13 Example of how an 8-bit pulse width modulator operates
1 .
0
C
9
0 .
8 /
B
0
0
0
1
A
8
G
Condition : Reload register = 0003
u
7
Count source
TA
input signal
PWM pulse output
from TA
Timer Ai interrupt
request bit
o r
TA
Underflow signal of
8-bit prescaler (Note2)
Count source (Note1)
PWM pulse output
from TA
Timer Ai interrupt
request bit
. g
0 -
iIN
u
iIN
1
0
p
0
pin
, 2
pin input signal
0
iOUT
2
iOUT
Condition : Reload register high-order 8 bits = 02
0
f
0
i
pin
(rising edge of TA
: Frequency of count source
Note: n = 0000
5
pin
(f
Page 105
1
, f
f
8
i
: Frequency of count source
, f
“H”
“H”
“L”
“L”
“1”
“0”
(f
32
1
, f
, f
Reload register low-order 8 bits = 02
External trigger (falling edge of TA
“H”
“H”
“H”
“L”
“L”
“L”
“1”
“0”
8
C32
, f
Note 1: The 8-bit prescaler counts the count source.
Note 2: The 8-bit pulse width modulator counts the 8-bit prescaler's underflow signal.
Note 3: m = 00
16
32
)
, f
to FFFE
f o
C32
3
iIN
)
2
9
pin input signal) is selected
16
16
.
Cleared to “0” when interrupt request is accepted, or cleared by software
16
, when external trigger
to FE
Trigger is not generated by this signal
16
; n = 00
1 / f
Cleared to “0” when interrupt request is accepted, or cleaerd by software
1 / f
i
1 / f
i
X
X
(2
16
n
i
16
1 / f
X (m + 1)
to FE
1 / f
– 1)
i
i
X (m + 1) X (2 – 1)
16
X (m + 1) X n
.
iIN
16
pin input signal) is selected
16
8
13. Timer A