M30800SFP-BL#D5 Renesas Electronics America, M30800SFP-BL#D5 Datasheet - Page 72

• Manufacturer Part Number: M30800SFP-BL#D5
• Description: MCU 3/5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30800SFP-BL#D5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

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1
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6
Figure 9.2 Format for specifying interrupt vector addresses
1 .
0
C
9.4 High-speed interrupts
9.5 Interrupts and Interrupt Vector Tables
9
0 .
8 /
High-speed interrupts are interrupts in which the response is executed at 5 cycles and the return is 3
cycles.
When a high-speed interrupt is received, the flag register (FLG) and program counter (PC) are saved to
the save flag register (SVF) and save PC register (SVP) and the program is executed from the address
shown in the vector register (VCT).
Execute a FREIT instruction to return from the high-speed interrupt routine.
High-speed interrupts can be set by setting “1” in the high-speed interrupt specification bit allocated to bit
3 of the exit priority register. Setting “1” in the high-speed interrupt specification bit makes the interrupt set
to level 7 in the interrupt control register into a high-speed interrupt.
You can only set one interrupt as a high-speed interrupt. When using a high-speed interrupt, do not set
multiple interrupts as level 7 interrupts.
The interrupt vector for a high-speed interrupt must be set in the vector register (VCT).
When using a high-speed interrupt, you can use a maximum of two DMAC channels.
The execution speed is improved when register bank 1 is used with high speed interrupt register selected
by not saving registers to the stack but to the switching register bank. In this case, switch register bank
mode for high-speed interrupt routine.
If an interrupt request is accepted, a program branches to the interrupt routine set in the interrupt vector
table. Set the first address of the interrupt routine in each vector table. Figure 9.2 shows the format for
specifying the address.
Two types of interrupt vector tables are available — fixed vector table in which addresses are fixed and
variable vector table in which addresses can be varied by the setting.
B
0
0
0
1
A
G
8
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7
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. g
0 -
u
1
0
p
0
, 2
0
2
0
0
5
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Vector address + 0
Vector address + 1
Vector address + 2
Vector address + 3
f o
3
2
9
MSB
0 0 0 0
High address
Low address
Mid address
0 0 0 0
LSB
9. Interrupt Outline