MC68HC11K0CFUE4 Freescale Semiconductor, MC68HC11K0CFUE4 Datasheet - Page 78

MCU 8-BIT 768 RAM 4MHZ 80-QFP

MC68HC11K0CFUE4

Manufacturer Part Number
MC68HC11K0CFUE4
Description
MCU 8-BIT 768 RAM 4MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11K0CFUE4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11K0CFUE4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Operating Modes and On-Chip Memory
4.5.3 Bootstrap Mode
Technical Data
78
Port B provides the high-order address byte (Addr[15:8]), port F the
low-order address byte (Addr[7:0]), port C the data bus (Data[7:0]), and
port G pin 7 the read/write line (R/W) which controls direction of data
flow.
Additionally, the E clock output can be used to synchronize external
decoders for enable signals.
Expanded mode also enables these two special features available only
on the K4 Family devices:
Both of these features are described in
and Chip
Resetting the MCU in special bootstrap mode selects a reset vector to a
special ROM bootloader program at addresses $BE00–$BFFF. The
bootloader program is used to download code, such as programming
algorithms, into on-chip RAM through the SCI. To do this:
When loading is complete, the MCU jumps to location $0080 and begins
executing the code. Interrupt vectors are directed to RAM, which allows
the use of interrupts through a jump table. The SCI transmitter requires
an external pullup resistor since it is part of port D, which the bootloader
configures for wired-OR operation.
1. Memory expansion uses port G[5:0] to increase the available
2. Four chip-select lines on port H[7:4] simplify selection of external
1. Send a synchronization character (see
2. Download up to 768 bytes (1 Kbyte for KS2) of program data,
Freescale Semiconductor, Inc.
For More Information On This Product,
external address space to 1 Mbyte.
memory devices.
receiver at the specified baud rate.
which the CPU places into RAM starting at $0080 and also echoes
back on the TxD signal. The bootloader program ends the
download after the RAM is full or when the received data line is
idle for at least four character times. See
Operating Modes and On-Chip Memory
Selects.
Go to: www.freescale.com
Section 11. Memory Expansion
Table
Table
4-2) to the SCI
4-2.
M68HC11K Family
MOTOROLA

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