MCF5280CVF66J Freescale Semiconductor, MCF5280CVF66J Datasheet - Page 194
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MCF5280CVF66J
Manufacturer Part Number
MCF5280CVF66J
Description
IC MPU RISC 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5280CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5280CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Interrupt Controller Modules
10.1.1.2 Interrupt Prioritization
As an active request is detected, it is translated into the programmed interrupt level, and the resulting 7-bit
decoded priority level (IRQ[7:1]) is driven out of the interrupt controller. The decoded priority levels from
all the interrupt controllers are logically summed together and the highest enabled interrupt request is then
encoded into a 3-bit priority level that is sent to the processor core during this prioritization phase.
10.1.1.3 Interrupt Vector Determination
Once the core has sampled for pending interrupts and begun interrupt exception processing, it generates
an interrupt acknowledge cycle (IACK). The IACK transfer is treated as a memory-mapped byte read by
the processor, and routed to the appropriate interrupt controller. Next, the interrupt controller extracts the
level being acknowledged from address bits[4:2], and then determines the highest priority interrupt request
active for that level, and returns the 8-bit interrupt vector for that request to complete the cycle. The 8-bit
interrupt vector is formed using the following algorithm:
For INTC0,
For INTC1,
Recall vector_numbers 0 - 63 are reserved for the ColdFire processor and its internal exceptions. Thus, the
following mapping of bit positions to vector numbers applies for the INTC0:
if interrupt source 1 is active and acknowledged,
if interrupt source 2 is active and acknowledged,
...
if interrupt source 8 is active and acknowledged,
if interrupt source 9 is active and acknowledged,
...
if interrupt source 62 is active and acknowledged,
The net effect is a fixed mapping between the bit position within the source to the actual interrupt vector
number.
If there is no active interrupt source for the given level, a special “spurious interrupt” vector
(vector_number = 24) is returned and it is the responsibility of the service routine to handle this error
situation.
Note this protocol implies the interrupting peripheral is not accessed during the acknowledge cycle since
the interrupt controller completely services the acknowledge. This means the interrupt source must be
explicitly disabled in the interrupt service routine. This design provides unique vector capability for all
interrupt requests, regardless of the “complexity” of the peripheral device.
Vector numbers 64-71, and 91-255 are unused.
10.2
The register programming model for the interrupt controllers is memory-mapped to a 256-byte space. In
the following discussion, there are a number of program-visible registers greater than 32 bits in size. For
these control fields, the physical register is partitioned into two 32-bit values: a register “high” (the upper
longword) and a register “low” (the lower longword). The nomenclature <reg_name>H and <reg_name>L
is used to reference these values.
10-4
Memory Map
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
vector_number = 64 + interrupt source number
vector_number = 128 + interrupt source number
then vector_number =
then vector_number =
then vector_number =
then vector_number =
then vector_number = 126
Freescale Semiconductor
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66
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