MCF5280CVF66J Freescale Semiconductor, MCF5280CVF66J Datasheet - Page 80
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MCF5280CVF66J
Manufacturer Part Number
MCF5280CVF66J
Description
IC MPU RISC 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet
1.MCF5216CVM66J.pdf
(766 pages)
Specifications of MCF5280CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Processor Series
MCF528x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5282-KIT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5280CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Enhanced Multiply-Accumulate Unit (EMAC)
3.1.1.1
The MAC is an extension of the basic multiplier in most microprocessors. It is typically implemented in
hardware within an architecture and supports rapid execution of signal processing algorithms in fewer
cycles than comparable non-MAC architectures. For example, small digital filters can tolerate some
variance in an algorithm’s execution time, but larger, more complicated algorithms such as orthogonal
transforms may have more demanding speed requirements beyond scope of any processor architecture and
may require full DSP implementation.
To balance speed, size, and functionality, the ColdFire MAC is optimized for a small set of operations that
involve multiplication and cumulative additions. Specifically, the multiplier array is optimized for
single-cycle pipelined operations with a possible accumulation after product generation. This functionality
is common in many signal processing applications. The ColdFire core architecture is also modified to
allow an operand to be fetched in parallel with a multiply, increasing overall performance for certain DSP
operations.
Consider a typical filtering operation where the filter is defined as in
Here, the output y(i) is determined by past output values and past input values. This is the general form of
an infinite impulse response (IIR) filter. A finite impulse response (FIR) filter can be obtained by setting
coefficients a(k) to zero. In either case, the operations involved in computing such a filter are multiplies
and product summing. To show this point, reduce
Equation
3-2
3-2, in which the accumulated sum is a past data values and coefficients sum.
Introduction to the MAC
y i ( )
=
k
∑
3
=
0
b k ( )x i k
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Figure 3-1. Multiply-Accumulate Functionality Diagram
(
y i ( )
–
)
=
=
N 1
k
∑
b 0 ( )x i ( )
=
–
Operand Y
1
a k ( )y i k
(
+
Accumulator(s)
–
b 1 ( )x i 1
Shift 0,1,-1
)
Equation 3-1
+
+ / -
X
(
N 1
k
∑
=
–
–
0
b k ( )x i k
)
Operand X
+
b 2 ( )x i 2
(
–
to a simple, four-tap FIR filter, shown in
(
)
–
Equation
)
+
b 3 ( )x i 3
(
3-1.
–
)
Freescale Semiconductor
Eqn. 3-1
Eqn. 3-2
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