C8051F121-GQR Silicon Laboratories Inc, C8051F121-GQR Datasheet - Page 173
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C8051F121-GQR
Manufacturer Part Number
C8051F121-GQR
Description
IC 8051 MCU FLASH 128K 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F121-GQR
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F1x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F120DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
336-1224 - DEVKIT-F120/21/22/23/24/25/26/27
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F121-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Bits 7 – 0: Byte 3 (bits 31 – 24) of MAC0 Accumulator.
Bits 7 – 0: Byte 2 (bits 23 – 16) of MAC0 Accumulator.
Bits 7 – 0: Byte 1 (bits 15 – 8) of MAC0 Accumulator.
*Note:
*Note:
*Note:
Bit7
Bit7
Bit7
R
R
R
The contents of this register should not be changed by software during the first two MAC0 pipeline stages.
The contents of this register should not be changed by software during the first two MAC0 pipeline stages.
The contents of this register should not be changed by software during the first two MAC0 pipeline stages.
SFR Definition 12.7. MAC0ACC3: MAC0 Accumulator Byte 3
SFR Definition 12.8. MAC0ACC2: MAC0 Accumulator Byte 2
SFR Definition 12.9. MAC0ACC1: MAC0 Accumulator Byte 1
Bit6
Bit6
Bit6
R
R
R
Bit5
Bit5
Bit5
R
R
R
Bit4
Bit4
Bit4
R
R
R
Rev. 1.4
Bit3
Bit3
Bit3
R
R
R
C8051F120/1/2/3/4/5/6/7
Bit2
Bit2
Bit2
R
R
R
C8051F130/1/2/3
Bit1
Bit1
Bit1
R
R
R
SFR Address: 0x95
SFR Address: 0x96
SFR Address: 0x94
SFR Page: 3
SFR Page: 3
SFR Page: 3
Bit0
Bit0
Bit0
R
R
R
00000000
00000000
Reset Value
00000000
Reset Value
Reset Value
173
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